![]() |
|
|
|||||||
![]() |
VHDL - How can I get data from Altera Triple Speed Ethernet (TSE) MACthrough Avalon bus? |
|
|
Thread Tools | Search this Thread |
|
|
#1 |
|
I know the simple answer will be use NisoII...
But in my situation is ..I cannot use NisoII or any other soft/hard core processor (actually is..I am not able to use any asm/c ..whatever computer programing language). I would want to know anyone try to build a FSM to "talk" with the Avalon bus before? What should I do/understand first for build a FSM to work as Master in Avalon bus? My project require to receive packet and put them into memory and then I have another logic to read from the memory. The data flow is that Ethernet --> PHY(chip) --> TSE MAC IP --> Avalon bus --> memory -- >DDR2 controller ->DDR2 memory. What I have now: 1. PCI Express Development Kit, Stratix II GX Edition (http:// http://www.altera.com/products/devki...ress_s2gx.html) 2. DDR2 controller demo (non Avalon Bus), (it is work on the PCI Express Development Kit) 3. TSE MAC IP (I did not try it..because all the demo are using NiosII) Aiken |
|
|
|
|
#2 |
|
Posts: n/a
|
Aiken wrote:
> I would want to know anyone try to build a FSM to "talk" with the > Avalon bus before? ftp://ftp.altera.com/up/pub/Universi...lon_Bridge.pdf Mike Treseler |
|