Help with Vector Array's in VHDL; Cannot shift from one to another

I only copy and pasted the relevant code for now. Heres what I'm trying to do. I have to shift from one register to another, i.e.: reg1<= reg2; reg2<=reg3;reg3<=reg4;

It doesn't matter what I do with reg4, i can leave it as it is

Here is the declaration for the vector array:

type REG_ARRAY is array (0 to 4) of STD_LOGIC_VECTOR (31 downto 0);
	signal reg1 : REG_ARRAY;
	signal reg2 : REG_ARRAY;
	signal reg3 : REG_ARRAY;
	signal reg4 : REG_ARRAY;

I know there are values stored to the register because I output them to a ram and I can read them. However, when i try this it gives me all zeros, instead of just shifting the values from one register to another.

FOR i IN 0 to 4 LOOP
   reg1(i) <= reg2(i);
   reg2(i) <= reg3(i);
   reg3(i) <= reg4(i);
END LOOP;

The FOR Loop is within a process, and the reg array's are not in the sensitivity list because if I put them in, every time I change one it goes back into the process and in the end assigns reg4 to all the registers.

Any idea why this doesn't work? Thanks

kenyandude