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Quartus v7.0 & configurations?

 
 
Mark McDougall
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      11-07-2007
Hi,

I'm having trouble getting Quartus to pickup my configuration...

a_pkg.vhdl has "A" component declaration
a.vhdl has "A" entity declaration
a1.vhdl uses a_pkg & has "A1" architecture of "A"
a2.vhdl uses a_pkg & has "A2" architecture of "A"

Now in b.vhdl I have...

entity B (...)
architecture SYN of B is
....
a_inst : A port map(...);
....
end END SYN;

configuration cfg_A of B is
for SYN
for a_inst : A
use entity work.A(A1);
end for;
end for;
end configuration cfg_A;

No matter where I place the configuration declaration (before or after the
architecture of B) it ignores it and uses architecture "A2" from a2.vhdl....

Any ideas what I'm doing wrong???

TIA
Regards,

--
Mark McDougall, Engineer
Virtual Logic Pty Ltd, <http://www.vl.com.au>
21-25 King St, Rockdale, 2216
Ph: +612-9599-3255 Fax: +612-9599-3266
 
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Mike Treseler
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      11-07-2007
Mark McDougall wrote:

> No matter where I place the configuration declaration (before or after the
> architecture of B) it ignores it and uses architecture "A2" from a2.vhdl....
> Any ideas what I'm doing wrong???


Did you tell quartus that cfg_A is the top entity?
Is it also above the other units in the file list?
Also see Andy's posts of yesterday -- direct instances are less trouble.
Good luck.

-- Mike Treseler
 
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Mike Treseler
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      11-07-2007
Mike Treseler wrote:

> Is it also above the other units in the file list?

*below*
 
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Mark McDougall
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      11-07-2007
Mike Treseler wrote:

> Did you tell quartus that cfg_A is the top entity?


No - entity B (for which cfg_A is the config) is not the top-level entity
in the design. Do I therefore need to represent the top-down hierarchy of
the project in cfg_X and specify that as the top-level design file???

> Is it also above the other units in the file list?


cfg_A appears in the same file as entity B declaration/implementation, at
the end of the file. This file appears in the file list after all the
entity A files...

FWIW I've read conflicting statements about where cfg_A must appear during
evaluation/synthesis...

Regards,

--
Mark McDougall, Engineer
Virtual Logic Pty Ltd, <http://www.vl.com.au>
21-25 King St, Rockdale, 2216
Ph: +612-9599-3255 Fax: +612-9599-3266
 
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Mark McDougall
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      11-07-2007
Mike Treseler wrote:

> Also see Andy's posts of yesterday -- direct instances are less trouble.


Ah!!! Thanks!

I'd tried
label : my_entity(my_architecture)
and got an error but not
label : entity work.my_entity(my_architecture)

.... the latter works!

Still, for future reference, I'd like to resolve the configuration issue...

Regards,

--
Mark McDougall, Engineer
Virtual Logic Pty Ltd, <http://www.vl.com.au>
21-25 King St, Rockdale, 2216
Ph: +612-9599-3255 Fax: +612-9599-3266
 
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KJ
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      11-07-2007

"Mark McDougall" <(E-Mail Removed)> wrote in message
news:473242b9$0$23911$(E-Mail Removed)...
> Mike Treseler wrote:
>
>> Also see Andy's posts of yesterday -- direct instances are less trouble.

>
> Ah!!! Thanks!
>
> I'd tried
> label : my_entity(my_architecture)
> and got an error but not
> label : entity work.my_entity(my_architecture)
>
> ... the latter works!
>
> Still, for future reference, I'd like to resolve the configuration
> issue...
>


If the configuration is not the top level, then this implies that at some
point in the design you're instantiating entity b, but what you need to
instantiate is configuration b.

What you probably have is
My_thing : entity work.b(....)

What I think you need is
My_thing : configuration work.cfg_a(....)


KJ


 
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