Help! Signed Number Representation in Xilinx Testbench Waveform

Hi,

I am using Xilinx ISE Testbench Waveform to simulate my VHDL code and
there is something that confused me:

-256 is equal to '111100000000' in two's complement
notation.'111100000000' is equal to 3840 if you interpret it as having
no sign bit.

In the testbench waveform I have several options to enter the input.
Some of them:
Decimal(Signed)
Decimal(Unsigned)
Binary

You can enter a number in one of these ways and you can also convert
one to the other. Thus, if I enter -256 while in the Decimal(Signed)
option, I expect it to be '111100000000' in the binary option. However,
I get '100100000000' or in Decimal(Unsigned), 2304.

Does Xilinx ISE Testbench Waveform use a representation other than 2's
complement? If I want to enter a negative number and want to process it
as a signed number in my code, how should I enter it in Xilinx ISE
Testbench Waveform?

Thanks in advance for any help

E.

Emel

On Wed, 18 Jan 2006, Emel wrote:

"I am using Xilinx ISE Testbench Waveform to simulate my VHDL code and
there is something that confused me:

-256 is equal to '111100000000' in two's complement
notation.'111100000000' is equal to 3840 if you interpret it as having
no sign bit.

In the testbench waveform I have several options to enter the input.
Some of them:
Decimal(Signed)
Decimal(Unsigned)
Binary

You can enter a number in one of these ways and you can also convert
one to the other. Thus, if I enter -256 while in the Decimal(Signed)
option, I expect it to be '111100000000' in the binary option. However,
I get '100100000000' or in Decimal(Unsigned), 2304.

Does Xilinx ISE Testbench Waveform use a representation other than 2's
complement?"

You said that if you enter -256 that the binary representation is reported
as 100100000000 which is +256 (100000000) in two's complement binary but
with three extra more significant bits (100). So one obvious possibility
is that the single most significant bit is a flag, which when 1 denotes
that the number is the negative of the positive two's complement number
made up from the other bits, and when 0 is a positive number.

This notation is called one's complement. Positive numbers are represented
identically in one's complement and two's complement, only their negative
representations differ.

"If I want to enter a negative number and want to process it
as a signed number in my code, how should I enter it in Xilinx ISE
Testbench Waveform?"

It seems that you are more comfortable with decimal. If you want to think
in terms of binary, simply mask out (what in unsigned arithmetic would be)
the most significant bit to think about the magnitude and pay attention
to only the most significant bit when you want to think about the sign.

N.B. Positive zero is not represented the same as negative zero in one's
complement notation.

Regards,
Colin Paul Gloster

Colin Paul Gloster

On Thu, 19 Jan 2006 11:46:24 +0100, Colin Paul Gloster
<> wrote:

>On Wed, 18 Jan 2006, Emel wrote:

>You said that if you enter -256 that the binary representation is reported
>as 100100000000 which is +256 (100000000) in two's complement binary but
>with three extra more significant bits (100). So one obvious possibility
>is that the single most significant bit is a flag, which when 1 denotes
>that the number is the negative of the positive two's complement number
>made up from the other bits, and when 0 is a positive number.
>
>This notation is called one's complement. Positive numbers are represented
>identically in one's complement and two's complement, only their negative
>representations differ.

Are you sure that's one's complement? Lools like sign&magnitude to me.

- Brian

Brian Drummond