Go Back   Velocity Reviews > Newsgroups > VHDL
User Name
Password
Register FAQ Members List Calendar Search Today's Posts Mark Forums Read

Reply

VHDL - About "metavalue detected, returning FALSE" warning..

 
Thread Tools Search this Thread
Old 09-15-2007, 04:35 PM   #1
Default About "metavalue detected, returning FALSE" warning..


Hi, there:

I am getting a long list of this warning in my simulations ocurring at 0ps.
Code segments is down below.
Other simulation results are unaffected.

How do I remove this warning?

Thanks in advance!



# ** Warning: NUMERIC_STD.">": metavalue detected, returning FALSE
# Time: 0 ps Iteration: 1 Instance: /conv_vit_sim/i_vitb_dec/i_aem_0

library IEEE;
use IEEE.numeric_std.all;
use IEEE.std_logic_1164.all;
....
signal tmp_aem_0, tmp_aem_1, tmp_aem_2, tmp_aem_3 : unsigned(BW_AEM-1 downto
0);
....
cmp_u <= '1' when (tmp_aem_0 <= tmp_aem_1) else '0';
cmp_l <= '1' when (tmp_aem_2 <= tmp_aem_3) else '0';






G Iveco
  Reply With Quote
Old 09-15-2007, 07:08 PM   #2
Mike Treseler
 
Posts: n/a
Default Re: About "metavalue detected, returning FALSE" warning..
G Iveco wrote:

> I am getting a long list of this warning in my simulations ocurring at 0ps.
> Code segments is down below.
> Other simulation results are unaffected.
> How do I remove this warning?


Initialize the testbench drive signal declarations.
These are all 'U' at time zero by default.

my_tb_sig : unsigned(BW_AEM-1 downto 0) := (others => '0');

-- Mike Treseler


Mike Treseler
  Reply With Quote
Old 09-16-2007, 02:08 PM   #3
David Bishop
 
Posts: n/a
Default Re: About "metavalue detected, returning FALSE" warning..
G Iveco wrote:
> Hi, there:
>
> I am getting a long list of this warning in my simulations ocurring at 0ps.
> Code segments is down below.
> Other simulation results are unaffected.
>
> How do I remove this warning?


If you are using Modeltech, you can set NumericStdNoWarnings to "1" to
ignore these warnings.

In the VHDL-200X package, there is a "package generic" that allows you
to shut these off in your testbench.


David Bishop
  Reply With Quote
Reply


Thread Tools Search this Thread
Search this Thread:

Advanced Search

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

vB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are Off
Pingbacks are Off
Refbacks are Off

Similar Threads
Thread Thread Starter Forum Replies Last Post
Error: Physical sythesis tool PALAC is not supported by Formal Verification tool Conf bbiandov Software 0 12-22-2008 05:25 AM




SEO by vBSEO 3.3.2 ©2009, Crawlability, Inc.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46