What is called carry chain structure in FPGA is called in IC?

Hi,
I want to know what is called carry chain structure in FPGA is called
in IC?

Thank you.

Weng

Weng Tianxiang

"Weng Tianxiang" <> wrote in message
news: ups.com...
> Hi,
> I want to know what is called carry chain structure in FPGA is called
> in IC?
>
> Thank you.
>
> Weng

Logic?

Depending on the library, you may have carry look-ahead structures
implemented or other optimized structures. It ends up as logic but with
ASIC specific implementation brought on by the library optimizations.

John_H

On Sep 10, 1:57 pm, "John_H" <newsgr...@johnhandwork.com> wrote:
> "Weng Tianxiang" <wtx...@gmail.com> wrote in message
>
> news: ups.com...
>
> > Hi,
> > I want to know what is called carry chain structure in FPGA is called
> > in IC?
>
> > Thank you.
>
> > Weng
>
> Logic?
>
> Depending on the library, you may have carry look-ahead structures
> implemented or other optimized structures. It ends up as logic but with
> ASIC specific implementation brought on by the library optimizations.

Hi John_H,
Is it called priority tree?

Weng

Weng Tianxiang

Weng Tianxiang wrote:
> On Sep 10, 1:57 pm, "John_H" <newsgr...@johnhandwork.com> wrote:
>> "Weng Tianxiang" <wtx...@gmail.com> wrote in message
>>
>> news: ups.com...
>>
>>> Hi,
>>> I want to know what is called carry chain structure in FPGA is called
>>> in IC?
>>> Thank you.
>>> Weng
>> Logic?
>>
>> Depending on the library, you may have carry look-ahead structures
>> implemented or other optimized structures. It ends up as logic but with
>> ASIC specific implementation brought on by the library optimizations.
>
> Hi John_H,
> Is it called priority tree?
>
> Weng

It's possible - though unlikely - that a priority tree (often used for
if/else blocks or case statements) would be used to implement the carry
structure in ASIC-optimized netlists.

There is no single answer for your query. It will be vendor-specific
since different compilers will optimize the code to different optimized
libraries.

John_H

On Sep 10, 9:13 am, Weng Tianxiang <wtx...@gmail.com> wrote:
> Hi,
> I want to know what is called carry chain structure in FPGA is called
> in IC?
> Thank you.
> Weng

Weng, the objective of the carry chain is easily defined: It
facilitates binary addition and subtraction, where any bit position
can affect the next higher bit position with a binary carry or borrow
signal.

The physical implementation can vary a lot, using different
compromises between speed and complexity (and perhaps power
consumption). There is ripple carry, carry look-ahead, carry
anticipate, and even more exotic methods. The FPGAs I am familiar with
use carry-look-ahead over 2 or 4 bits, which is just one step ahead of
the simplest ripple-carry. But since the FPGA carry structure is hard-
wired, it usually is faster than any more exotic scheme, if ithat were
implemented in an FPGA. At least in the usual range below 32 bits...
ASIC trade-offs are different.
Peter Alfke

Peter Alfke

On 10 Sep., 18:13, Weng Tianxiang <wtx...@gmail.com> wrote:
> Hi,
> I want to know what is called carry chain structure in FPGA is called
> in IC?

It is called a carry chain.
In most libraries it is part of the full adder cell.
While in general it is good for performance to have skewed cells that
provide
one path through the adder that is a lot faster than the other passes,
it turns
out that many mappers do not handle that case well. Therefore often
only
symetric cells are available. (Which are good for multipliers).

What the other posters mentioned actually are alternative carry
structures that
are not chains.

Kolja Sulimma

comp.arch.fpga

Peter Alfke wrote:

(snip on carry generation in FPGAs)

> The physical implementation can vary a lot, using different
> compromises between speed and complexity (and perhaps power
> consumption). There is ripple carry, carry look-ahead, carry
> anticipate, and even more exotic methods.

I thought the XC4000 series was a specialized form of carry
select using pass transistors. I haven't looked at the
newer series, I don't believe that they are documented as well
as the older ones. I used to do work on designs that used the
properties of the XC4000 carry chain. Since the carry logic
was separate from the CLB logic, one could use it, for example,
to compare two values without computing the difference.

-- glen

glen herrmannsfeldt