xilinx xst - dont change part type (re: n gate delay)

Hi,
My n gate delay is actualy working now,
well at least in the simulation
thanks to those who tried to help

However I found the problem after reading through the xst manual a few
times,
well actually that didnt help in itself but its always worth refreshing -
can only take in a certain amount each read,
but I found the NOREDUCE attribute,
wich does exactly what I wanted
ie allows extra (guard) logic to be put in to acount for race conditions
glitches etc
without it being removed.

however its only available for coolruner,
so I changed to coolruner and it worked

I also tested the other attributes SAVE NET and KEEP
any 1 of the 3 atributes makes it work too,

so I changed back to spartan3 to see what hapened
and that worked too,
however I realised that when I changed the code the simulator didnt
reflect the changes,
also the gates had been optimized out in the post map floorplanner.

so I created a new project with few gates in a spartan 3 and the save net
and keep attributes worked properly,
changed to coolrunner then back to spartan and it didnt work.

so changing the ISE to coolrunner is a one way ticket.

it would be nice to fit it in a coolruner but it quickly outgrew this,
I am expecting to get a spartan 3 board to do the development
but theres a chance can trim it down to a coolrunner.

anyway thought id share this.

I can now get a 0.7ns increment by changing the number of gates,
this all seems to be implemented with LUTs, Im looking to see if other ways
will add a slightly different amount.

ofc i can always adjust the wire length via placement.

to test it im using a small ring oscillator:-

clock_out<=a(2);
a(0)<=not (a(2) and a(3) and enable);
if a(0) ='1' or fast ='1' then
a(1)<='1';
else
a(1)<='0';
end if;
--a(1)<=a(0) or fast;
a(2)<=a(0) and a(1);
a(3)<=a(2) or fast;


3.6ns/2.7ns

Colin =^.^=

colin