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Send and receive bit in one clock

 
 
shah_satish2002 shah_satish2002 is offline
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Join Date: Jul 2007
Posts: 12
 
      07-26-2007
Hi !!

I am designing SPI interface between FPGA and Encoder.Here on Slave side, i have only 3 port (One is for clock, 2nd is for select slave and 3rd is for data, internally have MOSI and MISO port but externally connected with Transistor so i have only 3 port)..On master side, i am making 4 port (one is for sending bit to slave (MOSI), 2nd is receiving bit from slave to master(MISO), 3rd is clock and 4th is slave..here for data transmission on master side, i will connect externally one transistor between MISO and MOSI.)

Now my question is, How can i send bit from master to slave and recieve bit from slave to master in one clock..

If suppose i will use..

Clock'event and clock = '1' then it might be collison bit sending and receiving bit on same clock coz i have only one data line between slave and master. (if suppose, i have 2 data line then its not a problem)

Any idea how can i send and recieve one bit in one clock ?? or any new suggestion about .. ??

Thanks a lot..
 
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