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06-18-2007, 11:19 AM
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Generic RAM Implementation
HI.. i am quite a beginner in VHDL...
I am tryin to implement a generic RAM block on Xilinx 9i... but the RAM block is never inferred.. Can i work out a generic implementation of RAM using the ram256x1s and generate statement. If yes, then how? ANd why does a generic RAM model is'nt inferred? Anybody please help! -Ashish ashishb4u |
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