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06-12-2007, 02:28 PM
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#1 |
LFSR
Hi,
I'm searching for a VHDL implementation of a LFSR modulo 2 divisor to calculate the remainder of a polynomial division, with one bit per clock serial input and the remainder in output. Can someone send me an example of the VHDL code? Thank you. mn19 |
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06-12-2007, 03:12 PM
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#2 |
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Posts: n/a
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Re: LFSR
mn19 wrote:
> I'm searching for a VHDL implementation of a LFSR modulo 2 divisor http://groups.google.com/groups/search?q=vhdl+fcs Mike Treseler |
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