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VHDL - Changing a variable when simulating?? |
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06-04-2007, 04:32 PM
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#1 |
Changing a variable when simulating??
How would one go about setting a variable when you are simulating. I want to have some variables set differently when I am simulating vs when I am using real hardware. The reason for this is that I am using a 16K serial EEPROM model that I got off the web, but my design really uses a 32K. I need to change my addressing scheme when I am simulating.
Thanks in advance, Stan StanMan |
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06-05-2007, 04:34 AM
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#2 |
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Member
Join Date: Nov 2006
Posts: 32
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You can make use of generic statement and then you can change it during your simulation.
 quantum_dot |
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