module counter(X, clk, reset, Q);
input [11:0] X;
input clk;
input reset;
output [11:0] Q;
reg [11:0] Q;
reg [11:0] q_int;
integer count;
always @(posedge clk) begin
count = count + 1;
if(reset) q_int <= 0;
else q_int <= q_int + 1;
end
always @(q_int)
begin
if(q_int == X) level = LOW;
end
endmodule
1. the counter take as input a number (X) between 0 and 2400
2. the counter has another clk input, and the counter count the Clk pulses
3. the counter check
if (clk pulses < number x)
stay HIGH
if (Clk pulses >= number x)
change to LOW
if (Clk Pulses = 2400)
reset Clk Pulses and change to HIGH
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