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VHDL - Random Generator for Testbench |
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04-10-2007, 03:59 PM
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#1 |
Random Generator for Testbench
Hello!
How can I program a random generator for the testbench which creates a number between 0 and 7 (for example: 010, 101, 011, ...) which i can use to send to an input port. Who can help me? Acre |
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