VHDL - VHDL testbench enhancement proposals for OO and randomization

04-06-2007, 09:41 PM

Hi,
There are proposals for both OO and randomization in the
Accellera Extensions SC documents area. See webpage:
http://www.accellera.org/apps/org/wo.../documents.php

See below if you can't currently access these.

The current OO proposal is labeled Object Orientation Revisited,
is in the file, ESC-WP-001-oo-revisited.pdf, and can be downloaded
directly at (if your browser does not break the link):

http://www.accellera.org/apps/org/wo...-revisited.pdf

The current randomization proposal is labeled Randomization,
is in the file, Randomization-V1.pdf, and can be downloaded
directly at (if your browser does not break the link):
http://www.accellera.org/apps/org/wo...ization-V1.pdf

You must join the Accellera VHDL TSC to have access these documents.
You do not have to be an Accellera member to do this.
All you need to do is go to the following webpage and register:

http://www.accellera.org/activities/vhdl/

Under join here, select the appropriate "click here"
link (Accellera member vs. non-member).

Non-Accellera members fill in your name and information
and send the request to Lynn Horobin, Administration & Marketing.
In the big text box, ask to join Accellera VHDL TSC.

You may also sign up for any of the following subgroups by
request (either at the same time or sometime later - same
process though):

* VHDL-Requirements -- votes on whether to accept a requirement
* VHDL-Extensions -- creates a language extension proposal
* VHDL-Review -- votes on whether extension is what they wanted
* VHDL-LRM -- changes extension into edits for LRM

Note that most decisions in Accellera are made by consensus of all
participants. Only contentious items are decided by a
member based vote. In the last revision, I think there
were only 3 of over 100 items resolved by Accellera member
vote.

The only way your voice will not be heard is if you
fail to participate and this is up to you. In my case as
a senior member of the VHDL community, I consider it my
responsibility to participate.

Best Regards,
Jim
--
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ~~~~~~~~~~~
Jim Lewis
Director of Training private.php?do=newpm&u=
SynthWorks Design Inc. http://www.SynthWorks.com
1-503-590-4787

Expert VHDL Training for Hardware Design and Verification
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ~~~~~~~~~~~

Jim Lewis

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04-06-2007, 09:41 PM	#1
	VHDL testbench enhancement proposals for OO and randomization Hi, There are proposals for both OO and randomization in the Accellera Extensions SC documents area. See webpage: http://www.accellera.org/apps/org/wo.../documents.php See below if you can't currently access these. The current OO proposal is labeled Object Orientation Revisited, is in the file, ESC-WP-001-oo-revisited.pdf, and can be downloaded directly at (if your browser does not break the link): http://www.accellera.org/apps/org/wo...-revisited.pdf The current randomization proposal is labeled Randomization, is in the file, Randomization-V1.pdf, and can be downloaded directly at (if your browser does not break the link): http://www.accellera.org/apps/org/wo...ization-V1.pdf You must join the Accellera VHDL TSC to have access these documents. You do not have to be an Accellera member to do this. All you need to do is go to the following webpage and register: http://www.accellera.org/activities/vhdl/ Under join here, select the appropriate "click here" link (Accellera member vs. non-member). Non-Accellera members fill in your name and information and send the request to Lynn Horobin, Administration & Marketing. In the big text box, ask to join Accellera VHDL TSC. You may also sign up for any of the following subgroups by request (either at the same time or sometime later - same process though): * VHDL-Requirements -- votes on whether to accept a requirement * VHDL-Extensions -- creates a language extension proposal * VHDL-Review -- votes on whether extension is what they wanted * VHDL-LRM -- changes extension into edits for LRM Note that most decisions in Accellera are made by consensus of all participants. Only contentious items are decided by a member based vote. In the last revision, I think there were only 3 of over 100 items resolved by Accellera member vote. The only way your voice will not be heard is if you fail to participate and this is up to you. In my case as a senior member of the VHDL community, I consider it my responsibility to participate. Best Regards, Jim -- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ~~~~~~~~~~~ Jim Lewis Director of Training private.php?do=newpm&u= SynthWorks Design Inc. http://www.SynthWorks.com 1-503-590-4787 Expert VHDL Training for Hardware Design and Verification ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ~~~~~~~~~~~ Jim Lewis