Need help on a Modelsim VHDL Syntax? ASAP:)

03-14-2007, 10:43 PM

Hello,

I have been trying to simulate a xilinx library into my working directory but i am getting the following errors. Does anyone have any idea to what i should do?

It compiles for awhile and then gives me the following error: too long to put the whole list...so I'll put where the error starts!

vcom -87 -work unisim C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd
# -- Compiling entity dcm
# -- Compiling architecture new_dcm_v of dcm
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4577): Unknown identifier 'delay_length'.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(457

: Unknown identifier 'delay_length'.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4579): Unknown identifier 'delay_length'.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4580): Unknown identifier 'delay_length'.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4581): Unknown identifier 'delay_length'.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4917): No feasible entries for infix operator "-".
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4917): Type error resolving infix expression "-".
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4919): No feasible entries for infix operator "*".
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4919): Bad expression.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4919): Type error resolving infix expression "-".
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4926): Unknown identifier 'delay_length'.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4949): Assignment target type (error) is different from expression type time.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4951): No feasible entries for infix operator "*".
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4951): Type error resolving infix expression "*".
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4952): No feasible entries for infix operator "*".
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4952): Bad expression.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4952): Type error resolving infix expression "/".
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4953): No feasible entries for infix operator "/".
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4953): Type error resolving infix expression "/".
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4954): No feasible entries for infix operator "*".
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4954): Bad expression.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4954): Type error resolving infix expression "/".
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4959): Type error resolving function call "now".
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4963): Signal "clk_period" is type (error); expecting type time.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4965): Signal "clk_period" is type (error); expecting type time.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4970): Signal "clk_period" is type (error); expecting type time.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4972): Signal "clk_period" is type (error); expecting type time.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4981): No feasible entries for infix operator "*".
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4981): Bad expression.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4981): Bad right hand side (infix expression) in variable assignment.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4982): Variable "tmpshift" is type (error); expecting type time.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4984): No feasible entries for infix operator "*".
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4984): Bad expression.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4984): Bad expression.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4984): Bad right hand side (infix expression) in variable assignment.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4985): Variable "tmpshift" is type (error); expecting type time.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4991): Signal "clk_period" is type (error); expecting type time.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4995): Signal "clk_period" is type (error); expecting type time.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5001): Signal "clk_period" is type (error); expecting type time.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5006): Signal "clk_period" is type (error); expecting type time.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5015): Signal "clk_period" is type (error); expecting type time.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5020): Signal "clk_period" is type (error); expecting type time.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5025): Signal "clk_period" is type (error); expecting type time.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5031): No feasible entries for infix operator "+".
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5031): Type error resolving infix expression "+".
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5034): No feasible entries for infix operator "-".
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5034): Type error resolving infix expression "-".
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5043): Signal "clk_period" is type (error); expecting type time.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5065): Signal "clkfx_period" is type (error); expecting type time.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5069): No feasible entries for infix operator "+".
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5069): Type error resolving infix expression "+".
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5072): No feasible entries for infix operator "-".
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5072): Type error resolving infix expression "-".
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5081): Signal "clkfx_period" is type (error); expecting type time.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5104): No feasible entries for infix operator "+".
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5104): Type error resolving infix expression "+".
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5107): No feasible entries for infix operator "-".
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5107): Type error resolving infix expression "-".
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5116): Signal "clkdv_period" is type (error); expecting type time.
# ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5213): VHDL Compiler exiting
# C:/Modeltech_6.0c/win32/vcom failed.

kaji

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03-14-2007, 10:43 PM	#1
	Need help on a Modelsim VHDL Syntax? ASAP:) Hello, I have been trying to simulate a xilinx library into my working directory but i am getting the following errors. Does anyone have any idea to what i should do? It compiles for awhile and then gives me the following error: too long to put the whole list...so I'll put where the error starts! vcom -87 -work unisim C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd # -- Compiling entity dcm # -- Compiling architecture new_dcm_v of dcm # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4577): Unknown identifier 'delay_length'. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(457: Unknown identifier 'delay_length'. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4579): Unknown identifier 'delay_length'. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4580): Unknown identifier 'delay_length'. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4581): Unknown identifier 'delay_length'. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4917): No feasible entries for infix operator "-". # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4917): Type error resolving infix expression "-". # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4919): No feasible entries for infix operator "". # * Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4919): Bad expression. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4919): Type error resolving infix expression "-". # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4926): Unknown identifier 'delay_length'. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4949): Assignment target type (error) is different from expression type time. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4951): No feasible entries for infix operator "". # * Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4951): Type error resolving infix expression "". # * Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4952): No feasible entries for infix operator "". # * Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4952): Bad expression. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4952): Type error resolving infix expression "/". # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4953): No feasible entries for infix operator "/". # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4953): Type error resolving infix expression "/". # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4954): No feasible entries for infix operator "". # * Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4954): Bad expression. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4954): Type error resolving infix expression "/". # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4959): Type error resolving function call "now". # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4963): Signal "clk_period" is type (error); expecting type time. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4965): Signal "clk_period" is type (error); expecting type time. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4970): Signal "clk_period" is type (error); expecting type time. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4972): Signal "clk_period" is type (error); expecting type time. # ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4981): No feasible entries for infix operator "". # * Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4981): Bad expression. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4981): Bad right hand side (infix expression) in variable assignment. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4982): Variable "tmpshift" is type (error); expecting type time. # ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4984): No feasible entries for infix operator "". # * Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4984): Bad expression. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4984): Bad expression. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4984): Bad right hand side (infix expression) in variable assignment. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4985): Variable "tmpshift" is type (error); expecting type time. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4991): Signal "clk_period" is type (error); expecting type time. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(4995): Signal "clk_period" is type (error); expecting type time. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5001): Signal "clk_period" is type (error); expecting type time. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5006): Signal "clk_period" is type (error); expecting type time. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5015): Signal "clk_period" is type (error); expecting type time. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5020): Signal "clk_period" is type (error); expecting type time. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5025): Signal "clk_period" is type (error); expecting type time. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5031): No feasible entries for infix operator "+". # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5031): Type error resolving infix expression "+". # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5034): No feasible entries for infix operator "-". # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5034): Type error resolving infix expression "-". # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5043): Signal "clk_period" is type (error); expecting type time. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5065): Signal "clkfx_period" is type (error); expecting type time. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5069): No feasible entries for infix operator "+". # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5069): Type error resolving infix expression "+". # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5072): No feasible entries for infix operator "-". # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5072): Type error resolving infix expression "-". # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5081): Signal "clkfx_period" is type (error); expecting type time. # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5104): No feasible entries for infix operator "+". # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5104): Type error resolving infix expression "+". # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5107): No feasible entries for infix operator "-". # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5107): Type error resolving infix expression "-". # Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5116): Signal "clkdv_period" is type (error); expecting type time. # ** Error: C:/Xilinx/vhdl/src/unisims/unisim_vital.vhd(5213): VHDL Compiler exiting # C:/Modeltech_6.0c/win32/vcom failed. kaji