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ISDN BRI S/T line-code violation

 
 
asummit
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      05-10-2005
hi guys:
When i read CCNP Remote Access study Guide,it's say that Logic zero
bits are denoted by the presence of a +1 or -1 volt pulse. Logic one
bits are denoted by the absence of a pulse. Each logic zero bit will
alternate in polarity with respect to the previous pulse. A line-code
violation is declared when two consecutive pulses remain at the same
polarity.MY question is:in previous figure,on the s/t to nt1
direction,the DC Bits is -1 pulse,why the first B1 bits can be presence
of -1 pulse,will not so cause line-code violation?

 
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Phillip Remaker
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      05-11-2005

"asummit" <(E-Mail Removed)> wrote in message
news:(E-Mail Removed) oups.com...
> When i read CCNP Remote Access study Guide,it's say that Logic zero
> bits are denoted by the presence of a +1 or -1 volt pulse. Logic one
> bits are denoted by the absence of a pulse. Each logic zero bit will
> alternate in polarity with respect to the previous pulse.


Right. This is called "Alternate Mark Inversion" or "AMI"

> A line-code
> violation is declared when two consecutive pulses remain at the same
> polarity.


Right, decause it assume you must have missed one.

> MY question is:in previous figure,on the s/t to nt1
> direction,the DC Bits is -1 pulse,why the first B1 bits can be presence
> of -1 pulse,will not so cause line-code violation?


Uhhhh... What figure? Your question makes no sense.

Maybe http://support.isot.com/support/isdn-intro.htm will help you? The
start of frame is marked with an AMI line code violation which ensures there
is no DC signal and makes a clear start of frame.


 
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asummit
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      05-11-2005
Thanks for you reply,because the group can't display figure,so can i
send the figure to you by email?

 
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