Sudhir wrote:

> Hi

>

> I Have 2 constant values nu= 3.131764231e-3

> and v = 0.993736471

>

> Later on in my VHDL code I have to multiply these with two values

> which are std_logic_vectors of 20bits. So I would like to convert

> these constants to vectors of 20 bits without losing precision.How

> could I do so in VHDL

>

> tried to do conv_std_logic_vector(nu,20); unfortunately it didnt work!

>

> Please if anyone could help me I would be grateful
First off, these are real numbers. Real numbers don't synthesize.

Internally they are represented as 64 bit floating point numbers.

I would recommend using fixed point. Then you can convert the numbers

into something synthesizable.

http://www.vhdl.org/vhdl-200x/vhdl-2...ges/files.html
For the documentation.

For code to synthesize, look at:

http://www.vhdl.org/fphdl/vhdl.html