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VHDL - FIFO depth?

 
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Old 01-16-2007, 10:40 AM   #1
Default FIFO depth?


Hello All,

I have read many messages about fifo depth calculation but none of them
can help me.
I would like to implement pulse stuffing mechanism to packets of data
using synchronous FIFO.
How to calculate the depth of the FIFO if I know the period and the
length of the gaps?

Thanks in advance



krassi@bulinfo.net
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Old 01-17-2007, 07:24 PM   #2
HS
 
Posts: n/a
Default Re: FIFO depth?
Trial and error ?


escreveu:

> Hello All,
>
> I have read many messages about fifo depth calculation but none of them
> can help me.
> I would like to implement pulse stuffing mechanism to packets of data
> using synchronous FIFO.
> How to calculate the depth of the FIFO if I know the period and the
> length of the gaps?
>
> Thanks in advance




HS
  Reply With Quote
Old 01-18-2007, 08:30 AM   #3
krassi@bulinfo.net
 
Posts: n/a
Default Re: FIFO depth?
No, nothing trial.
The design is fully functional but my calculations about fifo depth
don't match practical results.
I need some basic points like: Is there burst rate ...


HS wrote:
> Trial and error ?
>
>
> escreveu:
>
> > Hello All,
> >
> > I have read many messages about fifo depth calculation but none of them
> > can help me.
> > I would like to implement pulse stuffing mechanism to packets of data
> > using synchronous FIFO.
> > How to calculate the depth of the FIFO if I know the period and the
> > length of the gaps?
> >
> > Thanks in advance




krassi@bulinfo.net
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Old 01-18-2007, 11:08 AM   #4
KJ
 
Posts: n/a
Default Re: FIFO depth?
Fifo depth would not be calculated based on any type of 'average' (such as
input comes in at 33 MHz, can be read out at 50 MHz) unless the reads and
writes to the fifo occur at precisely those rates (i.e. every 30 ns one new
thing comes in and every 20 ns the output side would read if there is
anything to read).

What you need to know is
- Clock speeds for both sides
- Worst case input burst size and burst speed (i.e. every 300 ns 10 new
things come in spaced 2 ns apart).
- Worst case read latency and burst speed (i.e. the output side can 'go
away' for as long as 10 us but when it comes back it can read in 1000 items
spaced 20 ns apart).

The depth that a fifo needs to be is a function of the characteristics of
the thing doing the writing and the thing doing the reading (as I've
attempted to describe above) as well as other system considerations (like
maybe if the fifo fills up you can simply flag the input side to stop
sending). Average data rates are just that 'averages' and are not
represenative of instantaneous behaviour....but the fifo overflowing only
cares about that instantaneous behaviour (i.e. it has one thing left to
write....and the fifo happens to be full)

Kevin Jennings

<> wrote in message
news: ups.com...
> No, nothing trial.
> The design is fully functional but my calculations about fifo depth
> don't match practical results.
> I need some basic points like: Is there burst rate ...
>
>
> HS wrote:
>> Trial and error ?
>>
>>
>> escreveu:
>>
>> > Hello All,
>> >
>> > I have read many messages about fifo depth calculation but none of them
>> > can help me.
>> > I would like to implement pulse stuffing mechanism to packets of data
>> > using synchronous FIFO.
>> > How to calculate the depth of the FIFO if I know the period and the
>> > length of the gaps?
>> >
>> > Thanks in advance

>





KJ
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Old 01-18-2007, 12:04 PM   #5
krassi@bulinfo.net
 
Posts: n/a
Default Re: FIFO depth?
Thanks for the reply.

You are right. In my case clock speeds are equal and I know the input
and output burst sizes and
the read latency (stuffing packet size). What time period I should use
when calculate the fifo depth, the period
of time when the sum of input gaps are equal to the output stuffing
packet or longer?

KJ wrote:
> Fifo depth would not be calculated based on any type of 'average' (such as
> input comes in at 33 MHz, can be read out at 50 MHz) unless the reads and
> writes to the fifo occur at precisely those rates (i.e. every 30 ns one new
> thing comes in and every 20 ns the output side would read if there is
> anything to read).
>
> What you need to know is
> - Clock speeds for both sides
> - Worst case input burst size and burst speed (i.e. every 300 ns 10 new
> things come in spaced 2 ns apart).
> - Worst case read latency and burst speed (i.e. the output side can 'go
> away' for as long as 10 us but when it comes back it can read in 1000 items
> spaced 20 ns apart).
>
> The depth that a fifo needs to be is a function of the characteristics of
> the thing doing the writing and the thing doing the reading (as I've
> attempted to describe above) as well as other system considerations (like
> maybe if the fifo fills up you can simply flag the input side to stop
> sending). Average data rates are just that 'averages' and are not
> represenative of instantaneous behaviour....but the fifo overflowing only
> cares about that instantaneous behaviour (i.e. it has one thing left to
> write....and the fifo happens to be full)
>
> Kevin Jennings
>
> <> wrote in message
> news: ups.com...
> > No, nothing trial.
> > The design is fully functional but my calculations about fifo depth
> > don't match practical results.
> > I need some basic points like: Is there burst rate ...
> >
> >
> > HS wrote:
> >> Trial and error ?
> >>
> >>
> >> escreveu:
> >>
> >> > Hello All,
> >> >
> >> > I have read many messages about fifo depth calculation but none of them
> >> > can help me.
> >> > I would like to implement pulse stuffing mechanism to packets of data
> >> > using synchronous FIFO.
> >> > How to calculate the depth of the FIFO if I know the period and the
> >> > length of the gaps?
> >> >
> >> > Thanks in advance

> >




krassi@bulinfo.net
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