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gate logic synthesis

 
 
Jean-Marc Delaplace
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      12-13-2006
Hello,
is there a tool (free if possible) that would do a logic schematic
synthesis from a VHDL source? I mean, using only the standard range of
TTL gates and flip-flops, including the decoders, multiplexers, etc. ?
Jean-Marc
 
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Mike Treseler
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      12-13-2006
Jean-Marc Delaplace wrote:

> is there a tool (free if possible) that would do a logic schematic
> synthesis from a VHDL source? I mean, using only the standard range of
> TTL gates and flip-flops, including the decoders, multiplexers, etc. ?
> Jean-Marc


The quartus RTL viewer might do what you want.
Have a look at the source and schematics ("object")
examples here: http://home.comcast.net/~mike_treseler/

There is a free version on the altera site,
and it includes the viewers, but I don't
know if they run unlicensed. Try it and see.

-- Mike Treseler
 
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Dave Pollum
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      12-14-2006
Mike Treseler wrote:
> Jean-Marc Delaplace wrote:
>
> > is there a tool (free if possible) that would do a logic schematic
> > synthesis from a VHDL source? I mean, using only the standard range of
> > TTL gates and flip-flops, including the decoders, multiplexers, etc. ?
> > Jean-Marc

>
> The quartus RTL viewer might do what you want.
> Have a look at the source and schematics ("object")
> examples here: http://home.comcast.net/~mike_treseler/
>
> There is a free version on the altera site,
> and it includes the viewers, but I don't
> know if they run unlicensed. Try it and see.
>
> -- Mike Treseler



In addition to Altera's Quartus software, Xilinx's ISE Webpack software
also generates RTL schematics. Webpack is a free download. I think
you have to register to get it, but you don't need to be a business.
ISE 8.x is _huge_, so you may want to download ISE 7.1 instead. Even
though I'm an ISE user, I did like the RTL schematics on Mike's site
that were made by the Altera software.

-Dave Pollum

 
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Jean-Marc Delaplace
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      12-14-2006
Mike Treseler a écrit :
> Jean-Marc Delaplace wrote:
>
>> is there a tool (free if possible) that would do a logic schematic
>> synthesis from a VHDL source? I mean, using only the standard range of
>> TTL gates and flip-flops, including the decoders, multiplexers, etc. ?
>> Jean-Marc

>
> The quartus RTL viewer might do what you want.
> Have a look at the source and schematics ("object")
> examples here: http://home.comcast.net/~mike_treseler/
>
> There is a free version on the altera site,
> and it includes the viewers, but I don't
> know if they run unlicensed. Try it and see.
>
> -- Mike Treseler


I checked, a license is required to run the RTL viewer.
Jean-Marc
 
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fpgaengineer
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      12-15-2006
Xilinx offers a 60day evaluation license for the full version AFAIK.

 
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