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VHDL - Error: VHDL Use Clause error at quartustest.vhd(6): design library "IEEE" does not contain primary unit "std_logic_textio" |
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11-23-2006, 02:39 AM
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#1 |
Error: VHDL Use Clause error at quartustest.vhd(6): design library "IEEE" does not contain primary unit "std_logic_textio"
use quartus 5.0
when compile a project, give this messege: Error: VHDL Use Clause error at quartustest.vhd(6): design library "IEEE" does not contain primary unit "std_logic_textio" how can i solve? feiyang |
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11-23-2006, 03:08 AM
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#2 |
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Posts: n/a
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Re: Error: VHDL Use Clause error at quartustest.vhd(6): design library "IEEE" does not contain primary unit "std_logic_textio"
TEXTIO is intended for simulation alone, not for synthesis, since
Quartus is a synthesizer it doesn't like it. Why do you have that in your RTL file? Or may be you are passing your tetsbench file to Quartus? Regards Ajeetha, CVC www.noveldv.com feiyang wrote: > use quartus 5.0 > when compile a project, give this messege: > Error: VHDL Use Clause error at quartustest.vhd(6): design library "IEEE" > does not contain primary unit "std_logic_textio" > how can i solve? |
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