ADC and DAC Converters VHDL model

Iam designing a system that includes an ADC and DAC Converters. In
order to simulate it, I need the models of the converters, if it would
be possible in VHDL lenguaje. Thank you.

__________________________________________________ _____________________

Xabier Iturbe
Area de Electrónica
IKERLAN
Pº J. M. Arizmendiarrieta, 2
20500 Mondragón (Gipuzkoa)
Tel.: +34 943 71 24 00 Fax: +34 943 79 69 44
E-mail: http: www.ikerlan.es
IK4 Research Alliance
__________________________________________________ _____________________

Xabier Iturbe

It is possible to model ADC/DAC in VHDL. It has real data type and
necessary procedural constructs for it. However if you want to model
pure analog things like oscialltor, jitter etc. it gets tricky. An
approximate model say using "successive approximation" algorithm is
doable in VHDL. I've done it in the past for a customer of mine, sorry
can't share the source code.

HTH
Ajeetha, CVC
www.noveldv.com

Xabier Iturbe wrote:
> Iam designing a system that includes an ADC and DAC Converters. In
> order to simulate it, I need the models of the converters, if it would
> be possible in VHDL lenguaje. Thank you.

I would write a simple, but cycle-accurate model
of the digital interfaces and use an integer port
to represent the analog pin. Note that some
vendors may have already done this for you.

-- Mike Treseler

On 22 Nov 2006 07:34:26 -0800, Xabier Iturbe <> wrote:
> Iam designing a system that includes an ADC and DAC Converters. In
> order to simulate it, I need the models of the converters, if it would
> be possible in VHDL lenguaje. Thank you.

Depending on the analog content, this might be suitable for VHDL-AMS.

A+
Paul
--
Paul Floyd http://paulf.free.fr (for what it's worth)
Not speaking for Mentor Graphics.

There are some behavioral models of ADCs and DACs at
http://www.freemodelfoundry.com/converters_vhdl.php. They use reals for
the analog ports.


Xabier Iturbe wrote:
> Iam designing a system that includes an ADC and DAC Converters. In
> order to simulate it, I need the models of the converters, if it would
> be possible in VHDL lenguaje. Thank you.
>
> __________________________________________________ _____________________
>
> Xabier Iturbe
> Area de Electrónica
> IKERLAN
> Pº J. M. Arizmendiarrieta, 2
> 20500 Mondragón (Gipuzkoa)
> Tel.: +34 943 71 24 00 Fax: +34 943 79 69 44
> E-mail: http: www.ikerlan.es
> IK4 Research Alliance
> __________________________________________________ _____________________
>

Thank you a lot. It is a wonderful help !!!!


__________________________________________________ _____________________

Xabier Iturbe
Area de Electrónica
IKERLAN
Pº J. M. Arizmendiarrieta, 2
20500 Mondragón (Gipuzkoa)
Tel.: +34 943 71 24 00 Fax: +34 943 79 69 44
E-mail: http: www.ikerlan.es
IK4 Research Alliance
__________________________________________________ _____________________

[rtl.engineer]

Originally Posted by FMF

There are some behavioral models of ADCs and DACs at
http://www.freemodelfoundry.com/converters_vhdl.php. They use reals for
the analog ports.


Xabier Iturbe wrote:
> Iam designing a system that includes an ADC and DAC Converters. In
> order to simulate it, I need the models of the converters, if it would
> be possible in VHDL lenguaje. Thank you.
>
> __________________________________________________ _____________________
>
> Xabier Iturbe
> Area de Electrónica
> IKERLAN
> Pº J. M. Arizmendiarrieta, 2
> 20500 Mondragón (Gipuzkoa)
> Tel.: +34 943 71 24 00 Fax: +34 943 79 69 44
> E-mail: http: www.ikerlan.es
> IK4 Research Alliance
> __________________________________________________ _____________________
>

Does the vhdl code from "http://www.freemodelfoundry.com/converters_vhdl.php" work still. because the ieee vital standard no longer recommends the usage of real datatype in the entity part of the declaration.

Please do clarify me with this.