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VHDL - Carry Save Adder (CSA) Verilog code |
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#1 |
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Hi,
I need the Verilog code for a carry save adder (CSA). Can some one please supply this. It takes three inputs and produces 2 outputs - the sum and the carry. Thaks Much. humble_Stuff@hotmail.com |
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#2 |
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Posts: n/a
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First, the likelyhood that you'll get a reply with verilog source from
a vhdl group is not high. Second, do your own homework, and get something out of the tuition you (or someone on your behalf) paid for. Andy wrote: > Hi, > > I need the Verilog code for a carry save adder (CSA). Can some one > please supply this. It takes three inputs and produces 2 outputs - the > sum and the carry. > > Thaks Much. |
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