On 25 Oct 2006 00:44:02 -0700, yaveh (Yet Another Vhdl Engineer Hoping)

<(E-Mail Removed)> wrote:

>

> Hi Paul,

>

> I am currently not using ADVance-MS, but the other company´s

> simulator, so
Too bad. Shouldn't that be 'an' other company, though? There are at

least two others.

> I think we should start with basic understanding of the language:

> I have read through "The System Designer´s Guide to VHDL-AMS" from

> Aschenden

> and have still doubts about what the "break" statement is for, about

> where analog solution points (ASP) should be computed, etc...
In the simulator, there are two kernels, analog and digital. The digital

kernel has it easy - signals have only a relative small number of

possible states, and events (changes between those states) can only

occur at discrete moments in time. The analog kernel, on the other hand,

has to deal with quantities that vary continuously. The quantities are

defined by a set of characteristic equations. These are solved using

numerical methods for differential equations. Such methods use a dynamic

time step. If the quantities change slowly, and it's easy to converge on

a solution, then the analog time step will increase. Conversely, if

there's no convergence, the analog time step will be decreased.

'break' causes the analog kernel to synchronise with the digital kernel.

This might be because there is a discontinuity in the analog quantities.

It is also possible to synchronize from the digital side, e.g., with

'above.

A bientot

Paul

--

Dr. Paul Floyd

http://paulf.free.fr (for what it's worth)

Surgery: ennobled Gerald.