Help with simple function call

Hi, just started learning functions in VHDL.

Making a simple mux4 function. I cannot seem to figure out what type
of conditional statements are allowed in functions. Trying quite a few
as you can see, but all of them are giving errors.

Any suggestions?

Thanks.

RishiD

Here is the complete code.

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity hw4_mux4 is
Port ( OpSel : in std_logic_vector(1 downto 0);
A : in std_logic_vector(7 downto 0);
B : in std_logic_vector(7 downto 0);
C : in std_logic_vector(7 downto 0);
D : in std_logic_vector(7 downto 0);
E : in std_logic_vector(7 downto 0);
F : in std_logic_vector(7 downto 0);
G : in std_logic_vector(7 downto 0);
H : in std_logic_vector(7 downto 0);
Z : out std_logic_vector(7 downto 0));
end hw4_mux4;

architecture behav of hw4_mux4 is
signal X : std_logic_vector(7 downto 0);
signal Y : std_logic_vector(7 downto 0);
function mux4 (fA, fB, fC, fD : std_logic_vector(7 downto 0); fOpSel :
std_logic_vector(1 downto 0))
return std_logic_vector is
variable result : std_logic_vector(7 downto 0);
begin


-- WITH fOpSel SELECT
-- result := fA WHEN "00",
-- fB WHEN "01",
-- fC WHEN "10",
-- fD WHEN "11",
-- NULL WHEN OTHERS;


result := fA when fOpSel = '00' ELSE
fB when fOpSel = '01' ELSE
fC when fOpSel = '10' ELSE
fD;



-- process (OpSel, A, B, C, D)
-- begin
-- case OpSel is
-- when "00" => result := A;
-- when "01" => result := B;
-- when "10" => result := C;
-- when "11" => result := D;
-- end case;
-- end process;

return result;

end mux4;

begin
X <= mux4(A, B, C, D, OpSel);
Y <= mux4(E, F, G, H, OpSel);
Z <= X - Y;
end behav;

Rishi Dhupar

Rishi Dhupar wrote:
> Hi, just started learning functions in VHDL.
>
> Making a simple mux4 function. I cannot seem to figure out what type
> of conditional statements are allowed in functions. Trying quite a few
> as you can see, but all of them are giving errors.
>
> Any suggestions?

This should get you started.

function mux4 (fA, fB, fC, fD : std_logic_vector; fOpSel :
std_logic_vector(1 downto 0)) return std_logic_vector is
variable result : std_logic_vector(7 downto 0);
begin
case fOpSel is
when "00" => result := fA;
when "01" => result := fB;
when "10" => result := fC;
when others => result := fD;
end case;
return(result);
end function mux4;
KJ

KJ