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switch design on fpga

 
 
hema
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      10-09-2006
hiiii,

In case of designing the switch controller on FPGA ,how to resolve the
contention when all the input buffers(FIFO) try out for the same output
FIFO????

regards,
hema.

 
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KJ
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      10-09-2006
"hema" <(E-Mail Removed)> wrote in message
news:(E-Mail Removed) ups.com...
> hiiii,
>
> In case of designing the switch controller on FPGA ,how to resolve the
> contention when all the input buffers(FIFO) try out for the same output
> FIFO????


An arbitrator.

KJ


 
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