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VHDL - DESIGN AND IMPLEMENTATION OF A 4 BIT ALU |
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#1 |
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I NEED THE WHOLE PROCE Design and Implementation of a 4-bit ALU
Purpose: The purpose is: To design a 4-bit ALU To implement the ALU on a FPGA To experimentally check the operation of the ALU Problem Statement: An Arithmetic and Logic Unit (ALU) is a combinational circuit that performs logic and arithmetic micro-operations on a pair of n-bit operands (ex. A[3:0] and B[3:0]). The operations performed by an ALU are controlled by a set of function-select inputs. In this lab you will design a 4-bit ALU with 3 function-select inputs: Mode M, Select S1 and S0 inputs. The mode input M selects between a Logic (M=1) and Arithmetic (M=0) operation. A block diagram is given in Figure 1. Figure 1: Block diagram of the 4-bit ALU The functions performed by the ALU are specified in Table I. Table 1: Functions of ALU M = 1 Logic S1 S0 C0 FUNCTION OPERATION (bit wise) 1 1 X (AiBi )' NAND 1 0 X (Ai + Bi )' NOR 0 0 X AiÅ Bi XOR 0 1 X (AiÅ Bi)' XNOR M = 0 Arithmetic S1 S0 C0 FUNCTION OPERATION 1 1 1 A Transfer A 1 1 0 A + 1 Increment A by 1 1 0 0 A + B Add A and B 1 0 1 A + B + 1 Increment the sum of A and B by 1 0 1 0 A + B' A plus one's complement of B 0 1 1 A - B Subtract B from A (i.e. B' + A + 1) 0 0 1 A' + B B plus one's complement of A 0 0 0 B - A B minus A (or A' + B + 1) Design strategies When designing the ALU we will follow the principle "Divide and Conquer" in order to use a modular design that consists of smaller, more manageable blocks, some of which can be re-used. There are different ways to design the ALU. One method consists of writing the truth table for the each bit of the ALU. For each bit this table has 6 inputs (M, S1, S0, C0, Ai and Bi) and two outputs Fi and Ci+1 . This can be done but may be tedious when it has to be done by hand. An alternative way is to split the ALU into two modules, one Logic and one Arithmetic module. Designing each module separately will be easier. A possible block diagram of the ALU is shown in Figure 2. It consists of three modules: 4-bit 2:1 MUX, a Logic unit and an Arithmetic unit.SS AND AM A NOVICE IN THIS COURSE. coldplay112 |
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#2 |
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coldplay112 wrote:
> I NEED THE WHOLE PROCE Design and Implementation of a 4-bit ALU > > Purpose: > The purpose is: > To design a 4-bit ALU > To implement the ALU on a FPGA > To experimentally check the operation of the ALU > Problem Statement: > An Arithmetic and Logic Unit (ALU) is a combinational circuit that > performs logic and arithmetic micro-operations on a pair of n-bit > operands (ex. A[3:0] and B[3:0]). The operations performed by an ALU > are controlled by a set of function-select inputs. In this lab you will > design a 4-bit ALU with 3 function-select inputs: Mode M, Select S1 and > S0 inputs. The mode input M selects between a Logic (M=1) and > Arithmetic (M=0) operation. A block diagram is given in Figure 1. > > > Figure 1: Block diagram of the 4-bit ALU > > > The functions performed by the ALU are specified in Table I. > > Table 1: Functions of ALU > M = 1 Logic > S1 S0 C0 FUNCTION OPERATION (bit wise) > 1 1 X (AiBi )' NAND > 1 0 X (Ai + Bi )' NOR > 0 0 X AiÅ Bi XOR > 0 1 X (AiÅ Bi)' XNOR > M = 0 Arithmetic > S1 S0 C0 FUNCTION OPERATION > 1 1 1 A Transfer A > 1 1 0 A + 1 Increment A by 1 > 1 0 0 A + B Add A and B > 1 0 1 A + B + 1 Increment the sum of A and B by 1 > 0 1 0 A + B' A plus one's complement of B > 0 1 1 A - B Subtract B from A (i.e. B' + A + 1) > 0 0 1 A' + B B plus one's complement of A > 0 0 0 B - A B minus A (or A' + B + 1) > > > Design strategies > When > designing the ALU we will follow the principle "Divide and Conquer" in > order to use a modular design that consists of smaller, more manageable > blocks, some of which can be re-used. > > There are different ways to design the ALU. One method > consists of writing the truth table for the each bit of the ALU. For > each bit this table has 6 inputs (M, S1, S0, C0, Ai and Bi) and two > outputs Fi and Ci+1 . This can be done but may be tedious when it has > to be done by hand. > An alternative way is to split the ALU into two modules, one Logic and > one Arithmetic module. Designing each module separately will be easier. > A possible block diagram of the ALU is shown in Figure 2. It consists > of three modules: 4-bit 2:1 MUX, a Logic unit and an Arithmetic unit.SS > AND AM A NOVICE IN THIS COURSE. > Kids these days... -Dave -- David Ashley http://www.xdr.com/dash Embedded linux, device drivers, system architecture |
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#3 |
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David Ashley a écrit :
> coldplay112 wrote: >> [..] > Kids these days... > -Dave New deal : - with the statement of the exercise above, find the book and the school from where it comes ! Pascal |
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#4 |
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Pascal Peyremorte a écrit :
> New deal : > - with the statement of the exercise above, find the book and the school > from where it comes ! > Great, Pascal ! You found the fun inside these boring "do my homework" posts ;o) And if only he could stop shouting his requests ... Nicolas |
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#5 |
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Nicolas Matringe wrote:
> Pascal Peyremorte a écrit : >> New deal : >> - with the statement of the exercise above, find the book and the >> school from where it comes ! >> I found two links: one written in 2001 (the first), one written in 2002 (the second): www.seas.upenn.edu/~ese201/lab/LabALU/ALU.html www.cse.ucsc.edu/classes/ cmpe100/Fall02/Labs/Experiment4.pdf The second says that some parts are taken from the first. > Great, Pascal ! You found the fun inside these boring "do my > homework" posts ;o) The interesting question now is: does the writer of the course that the OP is reading give credits to one of the original texts, or has *he* not done his homework? -- Paul. |
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#6 |
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Paul Uiterlinden wrote:
> Nicolas Matringe wrote: > > >>Pascal Peyremorte a écrit : >> >>>New deal : >>>- with the statement of the exercise above, find the book and the >>>school from where it comes ! >>> > > > I found two links: one written in 2001 (the first), one written in > 2002 (the second): > > www.seas.upenn.edu/~ese201/lab/LabALU/ALU.html > www.cse.ucsc.edu/classes/ cmpe100/Fall02/Labs/Experiment4.pdf > > The second says that some parts are taken from the first. > > >>Great, Pascal ! You found the fun inside these boring "do my >>homework" posts ;o) > > > The interesting question now is: does the writer of the course that > the OP is reading give credits to one of the original texts, or has > *he* not done his homework? > Wow, that's funny. The instructor doesn't come up with his/her own course material, (s)he just does internet searches and finds the stuff online + packages it up. So the students find the matching answers online. Pretty soon we'll be seeing instructors asking us to grade their students' submissions. This is like an apathy arms race -- which side can do less work. -Dave -- David Ashley http://www.xdr.com/dash Embedded linux, device drivers, system architecture |
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#7 |
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David Ashley wrote:
> Wow, that's funny. The instructor doesn't come up with his/her own > course material, (s)he just does internet searches and finds > the stuff online + packages it up. So the students find the matching > answers online. > > Pretty soon we'll be seeing instructors asking us to grade their > students' submissions. This is like an apathy arms race -- which > side can do less work. And guess who will be doing all the real work before soon. It's you and me! -- Paul. |
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#8 |
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Paul Uiterlinden wrote:
> I found two links: one written in 2001 (the first), one written in > 2002 (the second): > > www.seas.upenn.edu/~ese201/lab/LabALU/ALU.html > www.cse.ucsc.edu/classes/ cmpe100/Fall02/Labs/Experiment4.pdf > > The second says that some parts are taken from the first. Looks like it's not the same excersise, because in the OP article, there is an additional NOR and the LED output is missing, which makes it even more boring. Maybe the instructor took a look in the TTL series. dicovered the 74181 and thought this would be a good idea, because it is not too difficult, but could be a basic building block of a CPU, like all other TTL ICs. But the OP shows, that some students are overstrained with such simple task, so more interesting projects are not possible. If a static design without a clock is required (because it is easier), maybe something less abstract would be useful? Like "you are designing an alarm equipment. There are 4 alarm source. If more than one alarm source is 1, the alarm should be signalled. Alarm signaling should be inhibited by another input, a single numeric digit, 4 bits BCD encoded, and one bit, if a key unlocks the system...". I'm sure it is possible to design such a task, where the student learns as much about the basic logic elements and how to combine it as with an ALU. And if flipflops are allowed, it would be even more interesting. -- Frank Buss, http://www.frank-buss.de, http://www.it4-systems.de |
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#9 |
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On Sat, 23 Sep 2006 21:38:31 -0700, David Ashley
<> wrote: >+++Kids these days... >+++ >+++-Dave ************ Ought to look at Morris Mano text book and maybe he can find a solution for his homework. james |
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#10 |
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On Sun, 24 Sep 2006 17:03:00 +0200, Paul Uiterlinden <>
wrote: >+++I found two links: one written in 2001 (the first), one written in >+++2002 (the second): >+++ >+++www.seas.upenn.edu/~ese201/lab/LabALU/ALU.html >+++www.cse.ucsc.edu/classes/ cmpe100/Fall02/Labs/Experiment4.pdf >+++ >+++The second says that some parts are taken from the first. ************* I thought the diagrams looked familiar. Since one reference was 1. M. Mano and C. Kime, "Logic and Computer Design Fundamentals", 2nd Edition, Prentice Hall, Upper Saddle River, NJ, 2001. I bet the instructor took a lot from that text. Besides it looks a lot like the ALU from my hardware text by Morris Mano from 1994. There Mano describes the blocks of an ALU in very good detail. Then again from most student's comments on Mano's text books are horrible. Maybe it is due to those students that want their degrees handed to them on a silver platter. Maybe he makes them read and reread to understand what hardware design is all about. oh well james |
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