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hi guys, is there anyone who is using emacs to edit vhdl code?
I'm not used to emacs programming but I do use it a lot to write vhdl
code. But I'd like to customize it a bit and edit the template for the
process or for some others. To be more specific I rather like to write
in this way:

ProcessLabel: process (clk, nrst)
begin
if nrst = '0' then
sigA <= '0';
elsif rising_edge (clk) then
sigA <= sigB;
end if;
end process;

instead of:

ProcessLabel: process (clk, nrst)
begin
if nrst = '0' then
sigA <= '0';
elsif clk'event and clk = '1' then
sigA <= sigB;
end if;
end process;

Can anyone tell me how to change these templates?
By the way I'm using emacs under windows, can it be still possible?

thanks a lot

Alessandro Basili

alessandro basili wrote:
> hi guys, is there anyone who is using emacs to edit vhdl code?
> I'm not used to emacs programming but I do use it a lot to write vhdl
> code. But I'd like to customize it a bit and edit the template for the
> ...
> ...
> Can anyone tell me how to change these templates?
> By the way I'm using emacs under windows, can it be still possible?
>

You should locate
"vhdl-mode.el"
in your installation and modify it (is a lisp code)

on my OS there is "vhdl-mode.elc" ... a byte-code compiled version...
If you have a compiled version too... maybe you can substitute it with
the source code but I'm not sure...
You can find some example in
http://stuff.mit.edu/afs/sipb/contri...0/vhdl-mode.el

Sandro

Thanks a lot Sandro, I went through it but I thought it could have been
much easier, I'll see if it's worth to do that.
See you

Alessandro

wrote:
> alessandro basili wrote:
>
>>hi guys, is there anyone who is using emacs to edit vhdl code?
>>I'm not used to emacs programming but I do use it a lot to write vhdl
>>code. But I'd like to customize it a bit and edit the template for the
>>...
>>...
>>Can anyone tell me how to change these templates?
>>By the way I'm using emacs under windows, can it be still possible?
>>
>
>
> You should locate
> "vhdl-mode.el"
> in your installation and modify it (is a lisp code)
>
> on my OS there is "vhdl-mode.elc" ... a byte-code compiled version...
> If you have a compiled version too... maybe you can substitute it with
> the source code but I'm not sure...
> You can find some example in
> http://stuff.mit.edu/afs/sipb/contri...0/vhdl-mode.el
>
> Sandro
>

Allessandro,

Check out this menu item:

VHDL -> Options -> Templates -> Sequential Process -> Clock Edge Condition

Regards,
Marcus