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hi,
i have a problem in post synthesis simulation with MODELSIM....... after synthesising my vhdl code a .vho file and .sdo file ( i m using ALTERA QUARTUS) is genrated..........now when i compile my .vho file with modelsim for timing simulation..........it needs some libraries of device being selected. i m using CYCLONE (ALTERA) .......so anybody can provide me a list of such libraries or where can i find these libraries....... thank you ashwani anand ashu |
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