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VHDL - have some problems with Lookup Table.. |
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#1 |
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I need help with generating sine signal(1Hz) by lookup table as a core
(Single Port Block-Ram). I can use D/A 8-10 bits, baudrate of 10KHz. I working with XILINX VIRTEX-4 developing environment wondering if someone can give some suggestions how it can be done. THANKS in advance! Michael. MiP |
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#2 |
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Posts: n/a
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MiP wrote: > I need help with generating sine signal(1Hz) by lookup table as a core > (Single Port Block-Ram). > > I can use D/A 8-10 bits, baudrate of 10KHz. > I working with XILINX VIRTEX-4 developing environment > > wondering if someone can give some suggestions how it can be done. > > THANKS in advance! > Michael. If you're using a lookup table of say 10 bits, that's only 1024 entries, fairly small. Assumingthe output is to a DAC, you only need to lookup 0 to 90 degrees; you then start at address 0, increment address up to 1023, then back to 0 then flip the (extra) msb sign bit to the DAC and repeat. e.g. 0-90 & 90-180 are +ve, 180-270 & 270-360 are -ve sines. Also, you could use CORDIC (I've just beem inroduced to them myself) Xilinx do a free cordic in corgen, so might be useful, assuming you have a faster clock to do the cordic calcs. Niv |
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#3 |
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Posts: n/a
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> If you're using a lookup table of say 10 bits, that's only 1024
> entries, fairly small. > Assumingthe output is to a DAC, you only need to lookup 0 to 90 > degrees; > you then start at address 0, increment address up to 1023, then back to > 0 then flip the (extra) msb sign bit to the DAC and repeat. e.g. 0-90 > & 90-180 are +ve, 180-270 & 270-360 are -ve sines. > > Also, you could use CORDIC (I've just beem inroduced to them myself) > Xilinx do a free cordic in corgen, so might be useful, assuming you > have a faster clock to do the cordic calcs. Sorry but I didn't understand you clearly what do you mean. May I get an example of this implementation? Again thanks a lot for support. MiP |
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#4 |
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MiP wrote: > > If you're using a lookup table of say 10 bits, that's only 1024 > > entries, fairly small. > > Assumingthe output is to a DAC, you only need to lookup 0 to 90 > > degrees; > > you then start at address 0, increment address up to 1023, then back to > > 0 then flip the (extra) msb sign bit to the DAC and repeat. e.g. 0-90 > > & 90-180 are +ve, 180-270 & 270-360 are -ve sines. > > > > Also, you could use CORDIC (I've just beem inroduced to them myself) > > Xilinx do a free cordic in corgen, so might be useful, assuming you > > have a faster clock to do the cordic calcs. > > Sorry but I didn't understand you clearly what do you mean. > May I get an example of this implementation? > > Again thanks a lot > for support. Sin(0) = 0 or ~ 0000000000 for 10 bit lookup table (LUT) Sin(90) = 1 or ~ 1111111111 for 10 bit LUT. Sin (30) = 0.5 or ~ 1000000000 for 10 bit LUT Sin (75) = 0.9659 or ~ 1111011101 for LUT e.g. calculate sin(x), answer will be between 0 & 1. multiply by 2 to power 'N', for N bits, so times 1024 for your 10 bit example. Now put all the binary values into your lookup table (Xilinx block ram). Index through the LUT addresses with a bottom 10 bits of a 12 bit counter. bit(10) is used to invert the addresses to the LUT. bit(11) is used as a sign bit to the DAC, so if 0 then o/p is +ve & if 1 then o/p is -ve. Niv |
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