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VHDL - FSM State transition coverage

 
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Old 08-22-2006, 10:00 PM   #1
Default FSM State transition coverage


Hi,

We have a configurable state machine that need to be tested by generating testbench automatically to achieve 100% state and transition coverage.

When doing manually we know which of the transitions covered and not. Based on this feedback we can always add more stimulus until we achieve 100% coverage.

But when doing automatically how do I make sure that the stimulus generated is covering all the state trnasitions? In otherwords I need to travel thorugh all the state transitions. Some times I may need to travel back to some known state to cover some particular state transition.

Is there any way(algorithm) to travel through all the possible state transitions which can be used to automate my testing.

I appreciate any feedback.

Thanks
Hari


hari_krishna
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