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Hi,
I'm studying opencores DDR controller here: http://www.opencores.org/pdownloads.cgi/list/ddr_sdr In file ddr_sdr.vhd here is an excerpt: architecture behave of ddr_sdr is -- User Interface component user_if is port ( rst_int_n : in std_logic; -- async reset, lo-active sys_clk : in std_logic; -- user interface cmd : in std_logic_vector(U_CMD_WIDTH -1 downto 0); -- command: read, write, nop cmd_vld : in std_logic; addr : in std_logic_vector(U_ADDR_WIDTH-1 downto 0); -- ROW, BANK, COLUMN busy_q : out std_logic; -- busy flag, when active commands are ignored -- Datenaustausch mit Controller init_finished : in boolean; new_cmd_q : out boolean; new_cmd_ack : in boolean; do_prech_q : out boolean; -- precharge followed by activate do_wait_q : out boolean; -- additional delay requested cmd_q : buffer std_logic_vector(U_CMD_WIDTH -1 downto 0); addr_q : out std_logic_vector(U_ADDR_WIDTH -1 downto 0) ); end component; -- Global Buffer BUFG component bufg port ( i : in std_ulogic; o : out std_ulogic ); end component; -- pragma translate_off for all: bufg use entity unisim.bufg; -- pragma translate_on ---CUT My question is, in all the syntax rules I can find the "for all: bufg use entity unisim.bufg;" seems like an error. Why isn't it for all: bufg use entity unisim.bufg; end for; Where is the "end for;"? Is this related to the "-- pragma translate_off"? And more important, WTF is " -- pragma translate_off" supposed to be doing? What is all this VOODOO here? Thanks! -Dave David Ashley |
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#2 |
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Posts: n/a
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>
> My question is, in all the syntax rules I can find the > "for all: bufg use entity unisim.bufg;" seems like an error. > Why isn't it > for all: bufg > use entity unisim.bufg; > end for; > > Where is the "end for;"? > Good question. I would have expected it to be required as well. For interest this is a configuration statement selecting bufg from the xilinx unisim library, as opposed to whatever is in the work library (if anything). > Is this related to the "-- pragma translate_off"? > Yes and no - its not related to the syntax, but it is related to the reason the statement's there at all. > And more important, WTF is " -- pragma translate_off" supposed > to be doing? > The idea of this pragma is that simulators will ignore it completely while synthesizers will remove the code between translate_off/translate_on. If you know C then its somewhat like #ifdef SIMULATOR_ONLY #endif//SIMULATOR_ONLY Very useful construct that's equally easy to abuse. It's also worth noting that specific pragma's are not part of the language spec so no tool is required to implement them. This one seems to be well supported though. Cheers, Andy. Andy Ray |
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#3 |
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Posts: n/a
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Andy Ray wrote:
>... > Very useful construct that's equally easy to abuse. It's also worth > noting that specific pragma's are not part of the language spec so no > tool is required to implement them. This one seems to be well supported > though. Andy, Thanks, that all makes a lot of sense. So when I simulate this with GHDL it'll ignore the --pragmas and will use the correct model for the entity, but when I go use the xilinx tools to synthesize, it'll pay attention to the pragmas and know to cut out the section and instead use a bufg on the FPGA. That really clears up a lot for me. Thanks again. -Dave David Ashley |
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