Hi,
this is show controller atm0/0
Interface ATM0/0 is up
Hardware is ATM AIM E1 connected to AIM slot 0
hwidb=0x63C9C004, sardb=0x633BF864
slot 0, unit 0, subunit 0
MXT5100 versions: Framework 0x20E4, Utils 0x20C0,
AAL5 0x20C0, AAL2 0x20E3, AAL1 0x20C0,
IMA 0x20E2, CS 0xFFFF, Frame 0x20C2.
Current (mxt5100_t)sardb:
Ind_Q(0x656F2A0), Ind_Q_idx(1319), Ind_Q_size(30000)
Cmd_Q(0x656A440), Cmd_Q_idx(357), Cmd_Q_size(20000)
Inpool(0x6534080), Inpool_size(4096)
Outpool(0x65350C0), Outpool_size(4096)
Localpool(0x6540000), Localpool_size(256)
StorBlk(0x63C0000), host_blk(0x63BF824), em_blk(0x63BF8E4)
tx_buf_desc(0x65633C0), tx_free_desc_idx (1023)
MXT5100 sub_channel_mode is disabled
MXT5100 number of buffers in Inpool: 1024, Outpool 0
FPGA revision 0x2070007
MXT5100 Port Info:
Port Number (0), Port ID (0xE05)
Interface Number (4), Interface ID (0xF660)
Port Type CELL, Port Open Status SUCCESS
VCs configured (0)
Port counters: tx_cells 738626854, rx_cells 738582443,
rx_hec_errors 0, rx_cell_validation_errors 0
and this atm0/1
Interface ATM0/1 is up
Hardware is ATM AIM E1 connected to AIM slot 0
hwidb=0x63CCE9E4, sardb=0x633BF864
slot 0, unit 1, subunit 1
MXT5100 versions: Framework 0x20E4, Utils 0x20C0,
AAL5 0x20C0, AAL2 0x20E3, AAL1 0x20C0,
IMA 0x20E2, CS 0xFFFF, Frame 0x20C2.
Current (mxt5100_t)sardb:
Ind_Q(0x656F2A0), Ind_Q_idx(1443), Ind_Q_size(30000)
Cmd_Q(0x656A440), Cmd_Q_idx(467), Cmd_Q_size(20000)
Inpool(0x6534080), Inpool_size(4096)
Outpool(0x65350C0), Outpool_size(4096)
Localpool(0x6540000), Localpool_size(256)
StorBlk(0x63C0000), host_blk(0x63BF824), em_blk(0x63BF8E4)
tx_buf_desc(0x65633C0), tx_free_desc_idx (1023)
MXT5100 sub_channel_mode is disabled
MXT5100 number of buffers in Inpool: 1024, Outpool 0
FPGA revision 0x2070007
MXT5100 Port Info:
Port Number (1), Port ID (0xE85)
Interface Number (5), Interface ID (0xF680)
Port Type CELL, Port Open Status SUCCESS
VCs configured (0)
Port counters: tx_cells 756223316, rx_cells 755968400,
rx_hec_errors 1, rx_cell_validation_errors 1
this is ima
Interface ATM0/IMA1 is up
Hardware is ATM AIM IMA connected to AIM slot 0
hwidb=0x63CD8F88, sardb=0x633BF864
slot 0, unit 1, subunit 0
MXT5100 versions: Framework 0x20E4, Utils 0x20C0,
AAL5 0x20C0, AAL2 0x20E3, AAL1 0x20C0,
IMA 0x20E2, CS 0xFFFF, Frame 0x20C2.
Current (mxt5100_t)sardb:
Ind_Q(0x656F2A0), Ind_Q_idx(471), Ind_Q_size(30000)
Cmd_Q(0x656A440), Cmd_Q_idx(925), Cmd_Q_size(20000)
Inpool(0x6534080), Inpool_size(4096)
Outpool(0x65350C0), Outpool_size(4096)
Localpool(0x6540000), Localpool_size(256)
StorBlk(0x63C0000), host_blk(0x63BF824), em_blk(0x63BF8E4)
tx_buf_desc(0x65633C0), tx_free_desc_idx (1023)
MXT5100 sub_channel_mode is disabled
MXT5100 number of buffers in Inpool: 1024, Outpool 0
FPGA revision 0x2070007
MXT5100 IMA Group Info:
Group Number (1), Group Port ID (0xF05)
Group Index (0), Group Open Status SUCCESS
VCs configured (1)
IMA group alarms: NONE
IMA Link(0) alarms: NONE
IMA Link(1) alarms: NONE
MXT5100 Channel Info:
Channel Info (0):
Chan_ID (0x10A5), Open Status SUCCESS, VC(2)VPI/VCI(10/100),
Tx SBD(used/max 0/40), Tx PDU(939), Tx PDU discard(0)
Tx SDU size err(0), Tx cell CLP0(2040), Tx cell CLP1(0)
Rx PDU(0), Rx PDU discard(0), Rx SDU size err(0)
Rx CRC err(0), Rx cell CLP0(0), Rx cell CLP1(0)
framing and linecode are OK CRC4 and HDB3
"mh" <> ha scritto nel messaggio
news: om...
> I would tend to agree that it looks like the issue is probably not
> with the IMA interface
>
> Have you verified that framing and linecode match with what your
> carrier is using?
>
>
> what does show controller atm 0/0 and show controller atm 1/0 look
> like?
>
>
>
> Cisco CCO document
http://cco.cisco.com/en/US/products/...html#wp1079244
>
> shows a command
> Step 19
> connect connection-name atm slot/port [name of PVC/SVC|vpi/vci] E1
> slot/port TDM-group-number
>
> Example:
> Router(config)# connect alpha-IMA atm0/ima0 5/55 E1 2/0 1
>
> Establishes the connection between the T1 or E1 controller ports and
> the IMA