In article <>,
Terry Baranski <0VE> wrote:
:Why would small packets stress routers more than large packets?
:You're not the first to propose this theory but I just don't see it.
:I've been assuming that people say this because small packets are so
:inefficient from a bandwidth standpoint that you tend to run into a

ps/forwarding limit before you hit a bandwidth limit.
It depends in part on the router architecture. There are usually
per-port packet buffers, and logic at that level to do basic CRC and
other sanity checks. After that, a routing decision has to be made.
Cisco architectures that use line cards and supervisors try to avoid
sending header information around the bus -- they traditionally started
by sending only the source and destination IP addresses onward and only
transferred the port information if it turned out to be needed (i.e.,
for an acl.) As this cross-bus is shared by all the ports, time on it
is expensive -- when you are sending data about one packet over it, you
can't be sending data about a different packet on a different port.
Anyhow, once a forwarding decision is made for a port, a dma engine
kicks in to copy the rewritten packet to the appropriate destination
port buffers -- and until that dma engine finishes, you aren't
going to be getting a service request from that port. Thus, the
longer the packet, the longer the "breather" that the supervisory
logic gets from paying attention the port, during which the
supervisory logic can do other work. Conversely, when packets are
short, that port is going to end up wanting to interrupt "soon".
The shorter the packets in use, the less time the supervisory logic
has to make the routing decision before the next packet is ready.
:It makes perfect
:sense that with small enough packets you'll eventually max out the
:forwarding engine before you can saturate an interface's bandwidth.
:That this is the case doesn't mean smaller packets stress routers more
:-- it's just an issue of efficiency.
What do you mean by 'stress' then? Less time to react implies requires
faster busses and faster processing to maintain line rates. Faster
busses and faster processing usually implies greater heat and
electrical requirements, which physically stresses the electronics.
Certainly from time to time new substrates and transitor types are
found that are inherently faster and less energy hungry, but a lot
of electronics speed up comes from reducing feature sizes and pathways --
in effect packing more energy into a smaller area.
Have you ever looked at the energy consumption of an Itanium^2 chip?
130 Watts! And if you could run your processor 20 times slower because
you are using 1380 byte packets instead of 64 byte packets, would that
not stress the router less?
--
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