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VHDL - Problem during mixed VHDL SystemC simulation with Modelsim 6.2a

 
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Old 07-12-2006, 06:03 PM   #1
Default Problem during mixed VHDL SystemC simulation with Modelsim 6.2a


Hi folks,

Don't really know if it's the right place to ask, but I'm having
difficulties simulating a mixed systemC/VHDL model using Modelsim.

I have a simple VHDL testbench which instanciates the systemC module
(I used vgencomp to avoid port type/name mismatch). Whe I statrt the
simutlaion I get a "Constructor for SystemC module 'xr16_sc' not found"
error message.

Here is my Modelsim command log :

>vcom -reportprogress 300 -work work

E:/projects/RDISK/filter_image/vhdl_rdisk/xr16_sc_tb.vhd
# Model Technology ModelSim SE vcom 6.2a Compiler 2006.06 Jun 16 2006
# -- Loading package standard
[...]
# -- Loading entity xr16_sc
> sccom -I./sc/ sc/xr16.cpp

# Model Technology ModelSim SE sccom 6.2a compiler 2006.06 Jun 16 2006
#
# Exported modules:
# XR16_SC
> sccom -link

# Model Technology ModelSim SE sccom 6.2a compiler 2006.06 Jun 16 2006
> vsim work.xr16_sc_tb

# vsim work.xr16_sc_tb
# ** Note: (vsim-3812) Design is being optimized...
# ** Error: (vopt-3677) Constructor for SystemC module 'xr16_sc' not found.
# ** Error: Vopt Compiler exiting.
# Error loading design

Any hints ?

Thank in advance.


Steven Derrien
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Old 07-12-2006, 07:37 PM   #2
Hans
 
Posts: n/a
Default Re: Problem during mixed VHDL SystemC simulation with Modelsim 6.2a

Hi Steven,

The obvious question, do you have a constructor (i.e. SC_CTOR) specified in
your xr16.h header? You need to specify one since SC_CTOR does more than a
C++ constructor (hence the need for SC_HAS_PROCESS if you don't use SC_CTOR)

This could also be a Modelsim bug, try disabling vopt (vsim -novopt +acc)

Hans
www.ht-lab.com



"Steven Derrien" <> wrote in message
news:e93a7j$pd9$...
> Hi folks,
>
> Don't really know if it's the right place to ask, but I'm having
> difficulties simulating a mixed systemC/VHDL model using Modelsim.
>
> I have a simple VHDL testbench which instanciates the systemC module
> (I used vgencomp to avoid port type/name mismatch). Whe I statrt the
> simutlaion I get a "Constructor for SystemC module 'xr16_sc' not found"
> error message.
>
> Here is my Modelsim command log :
>
> >vcom -reportprogress 300 -work work

> E:/projects/RDISK/filter_image/vhdl_rdisk/xr16_sc_tb.vhd
> # Model Technology ModelSim SE vcom 6.2a Compiler 2006.06 Jun 16 2006
> # -- Loading package standard
> [...]
> # -- Loading entity xr16_sc
> > sccom -I./sc/ sc/xr16.cpp

> # Model Technology ModelSim SE sccom 6.2a compiler 2006.06 Jun 16 2006
> #
> # Exported modules:
> # XR16_SC
> > sccom -link

> # Model Technology ModelSim SE sccom 6.2a compiler 2006.06 Jun 16 2006
> > vsim work.xr16_sc_tb

> # vsim work.xr16_sc_tb
> # ** Note: (vsim-3812) Design is being optimized...
> # ** Error: (vopt-3677) Constructor for SystemC module 'xr16_sc' not
> found.
> # ** Error: Vopt Compiler exiting.
> # Error loading design
>
> Any hints ?
>
> Thank in advance.



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Old 07-13-2006, 10:50 AM   #3
Steven Derrien
 
Posts: n/a
Default Re: Problem during mixed VHDL SystemC simulation with Modelsim 6.2a

Hi,

This was a bug, disabling vopt solves the problem.
Thanks for the help.

Regards,

Steven

Hans a écrit :

> Hi Steven,
>
> The obvious question, do you have a constructor (i.e. SC_CTOR) specified in
> your xr16.h header? You need to specify one since SC_CTOR does more than a
> C++ constructor (hence the need for SC_HAS_PROCESS if you don't use SC_CTOR)
>
> This could also be a Modelsim bug, try disabling vopt (vsim -novopt +acc)
>
> Hans
> www.ht-lab.com
>
>

  Reply With Quote
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