Summarise the points needed for AHB Slave Interface Implementation

hi,

I have to implement a AHB slave interface which supports SPLIT.
This is what i have done :
1) When the Hsel =LOW or Hreadyin =LOW . Do nothing.Respond with
Hresp=OK and Hreadyout=HIGH.
2) When the Hsel=HIGH and Hreadyin=HIGH . If Htrans = NSEQ or SEQ ,If
Hwrite =HIGH ,write what is present on the data line at the address
given by Haddr and read in case of Hwrite= LOW.
3) When Hsel=HIGH,Hreadyin=HIGH and Htrans =IDLE or BUSY. Do nothing
..respnd with Hresp =OK and Hreadyout=HIGH.
3)If Hsize is other than 32 bit transfer,respond with the Hresp=ERROR
and Hreadyout=HIGH.
4)To split,respond with Hresp=SPLIT and record the master number.
5)To release the SPLIT, assert the appropriate line on HSPLIT.

This is all i have done and i think i have missed some points.Can
anyone help me point out some of those?

regards,
Anupam Jain

anupam.jain21@gmail.com

wrote:

> This is all i have done and i think i have missed some points.

write code, run a sim and verify to the specs, repeat


-- Mike Treseler

Hi Anupam,
Please read the inlime comments.
wrote:
> hi,
>
> I have to implement a AHB slave interface which supports SPLIT.
> This is what i have done :
> 1) When the Hsel =LOW or Hreadyin =LOW . Do nothing.Respond with
> Hresp=OK and Hreadyout=HIGH.
ok.
> 2) When the Hsel=HIGH and Hreadyin=HIGH . If Htrans = NSEQ or SEQ ,If
> Hwrite =HIGH ,write what is present on the data line at the address
> given by Haddr and read in case of Hwrite= LOW.
ok.
> 3) When Hsel=HIGH,Hreadyin=HIGH and Htrans =IDLE or BUSY. Do nothing
> .respnd with Hresp =OK and Hreadyout=HIGH.
ok.
> 3)If Hsize is other than 32 bit transfer,respond with the Hresp=ERROR
> and Hreadyout=HIGH.
Giving Error Responsce is fine. But you have to take care for the
Hreadyout signal. When ever error response is given , hreadyout should
remail low for the one clock cycle and high for once clock cycle for
the ERROR response.
Please refer the "Topic 3.9.3 "two-cycle response " " for the more
detials and the reason behind this.
> 4)To split,respond with Hresp=SPLIT and record the master number.
> 5)To release the SPLIT, assert the appropriate line on HSPLIT.
ok.
> This is all i have done and i think i have missed some points.Can
> anyone help me point out some of those?

done !

Regards,
Tarang Popat.

Tarang wrote:
> Hi Anupam,
> Please read the inlime comments.
> wrote:
> > hi,
> >
> > I have to implement a AHB slave interface which supports SPLIT.
> > This is what i have done :
> > 1) When the Hsel =LOW or Hreadyin =LOW . Do nothing.Respond with
> > Hresp=OK and Hreadyout=HIGH.
> ok.
> > 2) When the Hsel=HIGH and Hreadyin=HIGH . If Htrans = NSEQ or SEQ ,If
> > Hwrite =HIGH ,write what is present on the data line at the address
> > given by Haddr and read in case of Hwrite= LOW.
> ok.
> > 3) When Hsel=HIGH,Hreadyin=HIGH and Htrans =IDLE or BUSY. Do nothing
> > .respnd with Hresp =OK and Hreadyout=HIGH.
> ok.
> > 3)If Hsize is other than 32 bit transfer,respond with the Hresp=ERROR
> > and Hreadyout=HIGH.
> Giving Error Responsce is fine. But you have to take care for the
> Hreadyout signal. When ever error response is given , hreadyout should
> remail low for the one clock cycle and high for once clock cycle for
> the ERROR response.
> Please refer the "Topic 3.9.3 "two-cycle response " " for the more
> detials and the reason behind this.
> > 4)To split,respond with Hresp=SPLIT and record the master number.
> > 5)To release the SPLIT, assert the appropriate line on HSPLIT.
> ok.
> > This is all i have done and i think i have missed some points.Can
> > anyone help me point out some of those?
>
> done !
>
> Regards,
> Tarang Popat.

Hi,

The Handling of Hreadyout is not an issue as this is going to be a
behavioural code for the first level and so there is no timing for
now.This will an important point during implementation of RTL.

regards,
Anupam Jain