vhdl generate related

06-14-2006

how do i give a component portmap statement inside a generate
statement?
i need to instantiate a component n no. of times
the label is in the syntax so how i add that in the code?

06-14-2006

wrote:
> how do i give a component portmap statement inside a generate
> statement?

http://groups.google.com/groups?q=vh...e+unique+label

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