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VHDL - Schematic Problem (Beginner)

 
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Old 07-03-2006, 08:40 PM   #1
Default Schematic Problem (Beginner)


Hi
I'm new in CPLD and FPGA world
I have an application with XC9572 in PC84 package.
My problem is that if I make "and" from two signal and "nand" from the same signal I have the right wave in output simulation (one inv to the other), but when I make this in the phisic CPLD I have the same output not inv (like nand operation)!!!!
I have make this with isewebpack 7.1 and its schematic editor.
Can you help me?
I thanks all previusly


fabicenn
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