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VHDL - what's wrong with this piece of code

 
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Old 06-10-2006, 11:22 AM   #1
Default what's wrong with this piece of code


Dear all,

My simulator thinks it's fine, but maxplus II gives errors on this
piece of code.

level_1_proc: process(clk)
begin
if clk'event and clk='1' then
for i in 0 to 15 loop
sum_1(i*17+16 downto i*17)<=sxt(fifo((2*i)*16+15 downto
2*i*16),17) +

sxt(fifo((2*i+1)*16+15 downto (2*i+1)*16),17); --length is 17
dif_1(i*17+16 downto i*17)<=sxt(fifo((2*i)*16+15 downto
2*i*16),17) -
sxt(fifo((2*i+1)*16+15
downto (2*i+1)*16),17); --length is 17
end loop;
end if;
end process;

As you see it's a clock sync process, but the trap has (I think)
something to do with the index of e.g. sum_1. Is it possible to do it
like i*17+16 etc? If not, are there settings in Maxplus or Quartuss II
to solve this problem?

Thanks
Peter.



peter.linotte@gmail.com
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Old 06-10-2006, 12:25 PM   #2
Mike Treseler
 
Posts: n/a
Default Re: what's wrong with this piece of code
wrote:

> My simulator thinks it's fine,


Compiles fine, or sims with expected results?

> but maxplus II


Maxplus II is obsolete and not up to this task.
Use quartus 5 or 6.

> gives errors on this
> piece of code.


There are lots of errors.
What is yours?

-- Mike Treseler



Mike Treseler
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Old 06-10-2006, 05:32 PM   #3
peter.linotte@gmail.com
 
Posts: n/a
Default Re: what's wrong with this piece of code
Hi Mike,

Up to now, I just used the sim to compile my code and to check for
syntax errors etc.

At work I've got Quartus...I think I'll try it there and get back here
in case there are still errors.

Regards,

Mike Treseler wrote:
> wrote:
>
> > My simulator thinks it's fine,

>
> Compiles fine, or sims with expected results?
>
> > but maxplus II

>
> Maxplus II is obsolete and not up to this task.
> Use quartus 5 or 6.
>
> > gives errors on this
> > piece of code.

>
> There are lots of errors.
> What is yours?
>
> -- Mike Treseler




peter.linotte@gmail.com
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Old 06-11-2006, 12:21 PM   #4
hnain.said@gmail.com
 
Posts: n/a
Default Re: what's wrong with this piece of code

wrote:
> Hi Mike,
>
> Up to now, I just used the sim to compile my code and to check for
> syntax errors etc.
>
> At work I've got Quartus...I think I'll try it there and get back here
> in case there are still errors.
>
> Regards,
>
> Mike Treseler wrote:
> > wrote:
> >
> > > My simulator thinks it's fine,

> >
> > Compiles fine, or sims with expected results?
> >
> > > but maxplus II

> >
> > Maxplus II is obsolete and not up to this task.
> > Use quartus 5 or 6.
> >
> > > gives errors on this
> > > piece of code.

> >
> > There are lots of errors.
> > What is yours?
> >
> > -- Mike Treseler



hi,
just one more info : it's better to use

"if rising_edge(clk)" rather than "if clk'event and clk = '1' "

warm regards



hnain.said@gmail.com
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