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#1 |
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Hi folks
I'm looking for a free or open-source "source code formatter" for VHDL. The main requirement for me is tidying up of whitespace and indentation, since I plan to apply it to the output of a VHDL generator (written in XSL) which produces badly formatted VHDL. I see there have peen some previous posts on this topic (going back to 1994) but no useful replies. Can anyone help? Thanks in advance, Richard rnbrady@gmail.com |
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#2 |
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Posts: n/a
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wrote:
> Hi folks > > I'm looking for a free or open-source "source code formatter" for > VHDL. The main requirement for me is tidying up of whitespace and > indentation, since I plan to apply it to the output of a VHDL generator > (written in XSL) which produces badly formatted VHDL. http://groups.google.com/group/comp....-mode+beautify Mike Treseler |
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#3 |
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Posts: n/a
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Thanks Mike, this helped.
rnbrady@gmail.com |
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