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generics

 
 
Marco
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      05-24-2006
Hi,
there's something i don't understand about generics. Suppose I have to
use a component within my top entity, so in the declarative part of my
architecture I place the component declaration, while in the body of
the architecture I insert its instantiation. Here's my doubt, if I
assign a different value in these 2 places (say I write "my_generic :
integer := 1" inside declaration, while "my_generic => 2" in the
instantiation), which one will be the one considered by the
application?


Component Declaration:

component <component_name>
generic (
my_generic : integer := 1;
<other generics>...
);
port (
<port_name> : <mode> <type>;
<other ports>...
);
end component;



Component Instantiation:

<instance_name> : <component_name>
generic map (
my_generic => 2,
<other generics>...
)
port map (
<port_name> => <signal_name>,
<other ports>...
);

Thanks,
Marco

 
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KJ
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      05-24-2006
2 will be used for the generic. The only time 1 will be used is when
you instantiate the component and DON'T supply a generic value....i.e.

Component Instantiation:


<instance_name> : <component_name>
generic map (
--**** my_generic => 2,
<other generics>...
)
port map (
<port_name> => <signal_name>,
<other ports>...
);

 
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Ben Jones
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      05-24-2006

"Marco" <> wrote in message
news: oups.com...
> Hi,
> there's something i don't understand about generics. Suppose I have to
> use a component within my top entity, so in the declarative part of my
> architecture I place the component declaration, while in the body of
> the architecture I insert its instantiation. Here's my doubt, if I
> assign a different value in these 2 places (say I write "my_generic :
> integer := 1" inside declaration, while "my_generic => 2" in the
> instantiation), which one will be the one considered by the
> application?


The value you specify in the declaration (my_generic : integer := 1) is the
default value.

The value you specify in the instantiation (generic map my_generic => 2) is
the actual value.

If no actual value is specified, the default value is used. If no actual
value is specified and no default value is specified either, then the
instantiation is an error.

Cheers,

-Ben-


 
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Marco
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      05-24-2006
Ok, I see, but in any case the assignment within the instantiation, if
present, should be the considered one?
Thanks, Marco

 
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Marco
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      05-24-2006
Ok, everything clear.
Thanks,
Marco

 
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Ralf Hildebrandt
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      05-24-2006
Ben Jones wrote:


> If no actual value is specified, the default value is used. If no actual
> value is specified and no default value is specified either, then the
> instantiation is an error.



Let me add: This is a common a pitfall during synthesis. If you
synthesize the subcomponent, the default value will be used, if you
don't specify an actual value to the synthesis tool. If you forget it,
your synthesis tool uses the default value and your testbench a
different actual one.


Ralf
 
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Marco
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      05-24-2006
Ralf,
do you mean that if I set a default value in the declaration part,
while I forget to specify a value in the instantiation, I'll synthesize
with the inserted default value and I'll have a testbeanch with another
one, different from the default one?
Thanks, Marco

 
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Ralf Hildebrandt
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      05-24-2006
Marco wrote:


> do you mean that if I set a default value in the declaration part,
> while I forget to specify a value in the instantiation, I'll synthesize
> with the inserted default value and I'll have a testbeanch with another
> one, different from the default one?


If you have a component as in your example

component <component_name>
generic (
my_generic : integer := 1;
<other generics>...
);
port (
<port_name> : <mode> <type>;
<other ports>...
);
end component;

and you synthesize this component alone without giving a different
actual value to the generic my_generic, the synthesis tool will
synthesize with the default value which is 1.
Now, if you simulate your netlist inside your design making an
instantiation as in your example

Component Instantiation:

<instance_name> : <component_name>
generic map (
my_generic => 2,
<other generics>...
)
port map (
<port_name> => <signal_name>,
<other ports>...
);

then this will lead to wrong behavior, because the instantiation assumes
my_generic to be 2, but the netlist was synthesized with my_generic=1.
The netlist is fixed.


This pitfall is not a special behavior, but simply something, that can
be easily forgotten.


Ralf
 
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Andy
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      05-30-2006
Hmmm...

I think if the entity declaration has a default value, it may take
that, in the absense of either a default declaration on the component,
or an actual value in the generic map of the instance.

BTW, most tools (synpsys still has a few troubles with it) take entity
instantiations, obviating the need for component declarations,
configurations, default bindings, etc.

u1: entity entity_name(architecture_name)
generic_map(...

This has been a feature of vhdl since 1993!

Andy

 
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