Velocity Reviews - Computer Hardware Reviews

Velocity Reviews > Newsgroups > Programming > VHDL > trunc in verilog

Reply
Thread Tools

trunc in verilog

 
 
arti
Guest
Posts: n/a
 
      05-10-2006
hi

In vhdl I have function trunc
how can I use this function in verilog
exp
a= trunc(b) ;
Is it possible code this function use only gates AND and or ?

regards
arti
 
Reply With Quote
 
 
 
Reply

Thread Tools

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are Off


Similar Threads
Thread Thread Starter Forum Replies Last Post
floor(positive double) vs trunc(positive double) different Hicham Mouline C Programming 2 04-23-2010 06:50 PM
ios::trunc vs unlink aryan C++ 3 06-17-2008 07:15 AM
How do I trace the origin of "String or binary data would be trunc =?Utf-8?B?RGF2ZQ==?= ASP .Net 2 07-15-2007 07:56 AM
undefined reference to `trunc' Giulio C Programming 7 11-26-2004 01:06 AM
where to find DCT/IDCT for JPEG/JPEG2000 VHDL/VERILOG source code? walala VHDL 0 08-01-2003 09:44 PM



Advertisments