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VHDL - Breaking of Frames in Ethernet switch/Mux |
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Hi All,
I am very new to the Ethernet area. I am trying to design and Implement an Ethernet switch or Multiplexer. so say if I am bridging between two 1-gbps channels with one 2-gbps channel. when I think of designing a TDM switch between the 2 channels of 1 gbps my basic design will contain a MAC and a FIFO right...? I was thinking that if the incoming data frame is long so that it will cross the TDM slot for that channel of 1 gbps. then I will have to break that frame store the remaining data in fifo and send it in the next slot. Here I am not getting is that how it will get reconstructed at the receiving end . So firstly is it allowed to break like this if yes then how to insert a packet number etc in the frame. Please Help... Thanks & Regards. Kedar kedarpapte@gmail.com |
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