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VHDL - How to pass a global data type to an entity? |
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#1 |
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Hi,
I would like a help: How to pass a global data type to an entity? This is the statements I wrote and it has errors. LIBRARY ieee; USE ieee.std_logic_1164.all; use ieee.numeric_std.all; -- for "unsigned" LIBRARY unisim; USE UNISIM.VCOMPONENTS.ALL; package NewType is type ByteType is array(7 downto 0) of std_logic_vector(7 downto 0); end NewType; entity AModule is port ( DataIn : ByteType; ... ); end AModule; architecture A of AModule is .... end A; What is wrong? Thank you. Weng Weng Tianxiang |
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#2 |
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Posts: n/a
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On 20 Sep 2005 08:35:13 -0700, "Weng Tianxiang" <> wrote:
>This is the statements I wrote and it has errors. > >LIBRARY ieee; >USE ieee.std_logic_1164.all; >use ieee.numeric_std.all; -- for "unsigned" >LIBRARY unisim; >USE UNISIM.VCOMPONENTS.ALL; > >package NewType is >type ByteType is array(7 downto 0) of std_logic_vector(7 downto 0); >end NewType; > >entity AModule is port ( > DataIn : ByteType; [...] Two related problems: (1) LIBRARY and USE clauses do NOT apply to the whole source file. They apply only to the next design unit. Design unit = package, package body, entity, architecture, configuration. So, your LIBRARY and USE clauses apply only to the package. You need to repeat them just before the entity. (2) Creating a package in a source file does NOT make the package available to other design units in the source file. So, you need to "USE" the package just before the entity that needs it. The solution.... LIBRARY ieee; USE ieee.std_logic_1164.all; -- Only this is needed for NewType package NewType is type ByteType is array(7 downto 0) of std_logic_vector(7 downto 0); end NewType; -------------------------------------------------------------- LIBRARY ieee; USE ieee.std_logic_1164.all; use ieee.numeric_std.all; LIBRARY unisim; USE UNISIM.VCOMPONENTS.ALL; USE work.NewType.all; -- needed to make "ByteType" visible entity AModule is port ( DataIn : ByteType; Note that it is now OK to put the two design units in two separate source files. This is probably a good idea anyway. HTH -- Jonathan Bromley, Consultant DOULOS - Developing Design Know-how VHDL, Verilog, SystemC, Perl, Tcl/Tk, Verification, Project Services Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, BH24 1AW, UK Tel: +44 (0)1425 471223 mail: Fax: +44 (0)1425 471573 Web: http://www.doulos.com The contents of this message may contain personal views which are not the views of Doulos Ltd., unless specifically stated. Jonathan Bromley |
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#3 |
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Posts: n/a
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Weng Tianxiang wrote:
> How to pass a global data type to an entity? Put your global package in a separate file. Otherwise I have to compile AModule and its parents just to use your byte type in myModule. Use subtypes of standard vectors not new types. Add: use work.global_package.all; at the top of AModule. -- Mike Treseler ----------------------------------------------------------------- -- File global_package.vhd library ieee; use ieee.std_logic_1164.all; -- for std_logic_vector package global_package is subtype byte_t is std_logic_vector(7 downto 0); end package global_package; ----------------------------------------------------------------- -- File AModule library ieee; use ieee.std_logic_1164.all; -- for std_logic_vector use ieee.numeric_std.all; -- for unsigned use work.global_package.all; entity AModule is port ( DataIn : in byte_t; DataOut : out unsigned(byte_t'range) -- make use of package ); end entity AModule; architecture synth of AModule is begin DataOut <= unsigned(DataIn); -- make use of unsigned end architecture synth; ----------------------------------------------------------------- Mike Treseler |
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#4 |
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Posts: n/a
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Hi Mike, Jonathan,
I learn from your answers several times. Thank you very much. Weng Weng Tianxiang |
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