Velocity Reviews - Computer Hardware Reviews

Velocity Reviews > Newsgroups > Programming > VHDL > Convert from std_logic_vector to real

Reply
Thread Tools

Convert from std_logic_vector to real

 
 
eNo
Guest
Posts: n/a
 
      08-04-2005
Is there a standard library function (e.g., to_real) to convert a
std_logic_vector to a real value? If not, how would one go about doing this?


 
Reply With Quote
 
 
 
 
Ralf Hildebrandt
Guest
Posts: n/a
 
      08-05-2005
eNo wrote:

> Is there a standard library function (e.g., to_real) to convert a
> std_logic_vector to a real value? If not, how would one go about doing this?


With IEEE.numeric_std.all

signal slv : std_logic_vector(bitwidth-1 downto 0);
signal sru,srs : real;

sru<=to_real(to_integer(unsigned(slv)));
-- or
srs<=to_real(to_integer(signed(slv)));


It looks not nice with IEEE.numeric_std, but as noted the decision for
signed / unsigned is nessecary and therefore IEEE.numeric_std is
recommended.

Ralf
 
Reply With Quote
 
 
 
 
Hubble
Guest
Posts: n/a
 
      08-09-2005
The problem lies in the fact that you can represent real values in
different ways as bits. The IEEE floating point format defines a
standard doing this for single/double precision. First converting to a
signed or unsigned integer does not solve the problem in all cases. I
do not know of any standard library functions to convert
std_logic_vector representations of IEEE floating point to real.

As the term "floating point" suggests, the decimal point floats. An
part of the format (exponent) defines the position of the decimal point
here.

In hardware, often fixed point arithmetic will do. You could use 24
bits before and 8 bits after the decimal point. In this case, convert
to integer, divide by 2**8 and assign to the real value.

Integer aithmetic in VHDL is restricted to the range integer'low to
integer'high, which is only guaranteed to work for vectors up to 32
bits, so first converting to integer and then to real may not work for
larger vectors

Hubble.

 
Reply With Quote
 
 
 
Reply

Thread Tools

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are Off


Similar Threads
Thread Thread Starter Forum Replies Last Post
Conversion of 'real' to 'std_logic_vector' ? GeekWizard VHDL 0 05-08-2008 12:52 PM
inout std_logic_vector to array of std_logic_vector of generic length conversion... Thomas Rouam VHDL 6 11-09-2007 11:49 AM
Convert Real number to Std_logic_vector Sudhir VHDL 2 03-10-2007 05:18 PM
how to convert real type to std_logic_vector ? jing VHDL 1 05-17-2006 05:41 PM
Data conversion: complex, real, std_logic_vector... eneko VHDL 2 10-20-2004 02:39 PM



Advertisments