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aggregate operator

 
 
praveen.rajaretnam@gmail.com
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      07-11-2005
Hi. Can anyone tell me what the aggregate operator in VHDL is???
thanks.

 
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Stephane
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      07-12-2005
&
 
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Stephane
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      07-12-2005
& is concatenation; I think it's what you're looking for:

your_signal(31 downto 0) <= bobs_signal(31 downto 24) & "00000000" &
alices_signal(15 downto & that_wire & and_this_one & '1' &
and_so_on(4 downto 0);

 
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praveen.rajaretnam@gmail.com
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      07-12-2005
thanks for that one... I should have guessed that!

Stephane wrote:
> & is concatenation; I think it's what you're looking for:
>
> your_signal(31 downto 0) <= bobs_signal(31 downto 24) & "00000000" &
> alices_signal(15 downto & that_wire & and_this_one & '1' &
> and_so_on(4 downto 0);


 
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