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VHDL - Intialization of State machine |
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07-04-2005, 11:38 PM
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#1 |
Intialization of State machine
Hello,
I saw the code of many state machines in different books, intializing the state machine's register with the help of Asychncrounous external RESET . How the state machine resgister will be intialized, if there is no externel RESET available. Please advice! Thanks Regards john john |
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07-05-2005, 07:05 AM
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#2 |
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Posts: n/a
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Re: Intialization of State machine
"john" <> wrote:
> I saw the code of many state machines in different books, intializing > the state machine's register with the help of Asychncrounous external > RESET . How the state machine resgister will be intialized, if there is > no externel RESET available. Please advice! You need to identify an event that starts the fsm regardless of its state, than ensure that this event is processed in every _possible_ state (especially in the netlist). Else you need to introduce such an event (e.g. synchronous reset). bye Thomas Thomas Stanka |
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07-05-2005, 01:01 PM
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#3 |
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Posts: n/a
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Re: Intialization of State machine
> How the state machine resgister will be intialized, if there is
> no externel RESET available. Please advice! May be you ask the inventor of such machine? I know that FPGA chips supply internal reset activating it during configuration time. valentin tihomirov |
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