Go Back   Velocity Reviews > Newsgroups > VHDL
User Name
Password
Register FAQ Members List Calendar Search Today's Posts Mark Forums Read

Reply

VHDL - attribute signal name

 
Thread Tools Search this Thread
Old 06-28-2005, 11:48 PM   #1
Default attribute signal name


Hi,
Can I access a std_logic signal attribute that is the signals name as a
string?
This isn't the 'image attribute is it?

Say for example I had a proceduure that did a check on various signals
and I wanted to 'report' the condition and the signal name; then I
would have to have two inputs, the signal and a string of the signal
name. (?)
--Ross



--Ross
  Reply With Quote
Old 06-29-2005, 05:42 PM   #2
Jonathan Bromley
 
Posts: n/a
Default Re: attribute signal name
On 28 Jun 2005 15:48:08 -0700, "--Ross" <>
wrote:

>Hi,
>Can I access a std_logic signal attribute that is the signals name as a
>string?


Yup: my_signal'SIMPLE_NAME (or 'PATH_NAME or 'INSTANCE_NAME).

>Say for example I had a proceduure that did a check on various signals
>and I wanted to 'report' the condition and the signal name; then I
>would have to have two inputs, the signal and a string of the signal
>name. (?)


No. A signal-class formal parameter is a reference to a real
signal, so life is good for you. Try this:

library ieee;
use ieee.std_logic_1164.all;
use std.textio.all;

entity name_attrib is end;

architecture A of name_attrib is
signal SIG: std_logic;
procedure P (signal S: in std_logic) is begin
write(output, "simple_name = " & S'simple_name & CR & LF);
write(output, "path_name = " & S'path_name & CR & LF);
write(output, "instance_name = " & S'instance_name & CR & LF);
end;
begin
process begin
P(SIG);
wait;
end process;
end;

Yet more stuff that's easy in VHDL but the Verilog folk didn't
think of
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL, Verilog, SystemC, Perl, Tcl/Tk, Verification, Project Services

Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, BH24 1AW, UK
Tel: +44 (0)1425 471223 mail:
Fax: +44 (0)1425 471573 Web: http://www.doulos.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.



Jonathan Bromley
  Reply With Quote
Reply


Thread Tools Search this Thread
Search this Thread:

Advanced Search

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

vB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are Off
Pingbacks are Off
Refbacks are Off

Similar Threads
Thread Thread Starter Forum Replies Last Post
I am having trouble editing a signal in a sub program. Haai Hardware 0 08-28-2007 02:58 PM
Need help on Modelsim VHDL syntax? ASAP:) kaji General Help Related Topics 0 03-14-2007 10:43 PM
Need help on a Modelsim VHDL Syntax? ASAP:) kaji Software 0 03-14-2007 10:43 PM
Need Help on a Modelsim VHDL Syntax....ASAP:) kaji Hardware 0 03-14-2007 10:41 PM
IMHO, Digital SECAM video is better than Analog NTSC video Radium DVD Video 167 10-25-2006 04:16 AM




SEO by vBSEO 3.3.2 ©2009, Crawlability, Inc.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46