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Hi,
Can I access a std_logic signal attribute that is the signals name as a string? This isn't the 'image attribute is it? Say for example I had a proceduure that did a check on various signals and I wanted to 'report' the condition and the signal name; then I would have to have two inputs, the signal and a string of the signal name. (?) --Ross --Ross |
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#2 |
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Posts: n/a
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On 28 Jun 2005 15:48:08 -0700, "--Ross" <>
wrote: >Hi, >Can I access a std_logic signal attribute that is the signals name as a >string? Yup: my_signal'SIMPLE_NAME (or 'PATH_NAME or 'INSTANCE_NAME). >Say for example I had a proceduure that did a check on various signals >and I wanted to 'report' the condition and the signal name; then I >would have to have two inputs, the signal and a string of the signal >name. (?) No. A signal-class formal parameter is a reference to a real signal, so life is good for you. Try this: library ieee; use ieee.std_logic_1164.all; use std.textio.all; entity name_attrib is end; architecture A of name_attrib is signal SIG: std_logic; procedure P (signal S: in std_logic) is begin write(output, "simple_name = " & S'simple_name & CR & LF); write(output, "path_name = " & S'path_name & CR & LF); write(output, "instance_name = " & S'instance_name & CR & LF); end; begin process begin P(SIG); wait; end process; end; Yet more stuff that's easy in VHDL but the Verilog folk didn't think of -- Jonathan Bromley, Consultant DOULOS - Developing Design Know-how VHDL, Verilog, SystemC, Perl, Tcl/Tk, Verification, Project Services Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, BH24 1AW, UK Tel: +44 (0)1425 471223 mail: Fax: +44 (0)1425 471573 Web: http://www.doulos.com The contents of this message may contain personal views which are not the views of Doulos Ltd., unless specifically stated. Jonathan Bromley |
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