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06-24-2005, 03:36 PM
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#1 |
Log implementation in vhdl
Hi all, how can we implement logarithm of a number in VHDL.
any tips ??? thanx praveen.rajaretnam@gmail.com |
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06-24-2005, 04:16 PM
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#2 |
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Re: Log implementation in vhdl
LUT?
TigerJade |
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06-24-2005, 05:20 PM
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#3 |
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Re: Log implementation in vhdl
On 24 Jun 2005 07:36:14 -0700, wrote:
>Hi all, how can we implement logarithm of a number in VHDL. >any tips ??? thanx A normaliser counts leading zeros and extracts the mantissa, so giving the logarithm to within 6dB. Typically you can then do table lookup on the top few bits of the normalised result, to get some more accuracy. Obviously, it depends on the precision you need. Standard methods such as Taylor series and CORDIC may also be useful if you want really high precision. Once again, it's MUCH easier if you normalise the number first, so that you only need to find the log of a number in the range 0.5 to 1.0 -- Jonathan Bromley, Consultant DOULOS - Developing Design Know-how VHDL, Verilog, SystemC, Perl, Tcl/Tk, Verification, Project Services Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, BH24 1AW, UK Tel: +44 (0)1425 471223 mail: Fax: +44 (0)1425 471573 Web: http://www.doulos.com The contents of this message may contain personal views which are not the views of Doulos Ltd., unless specifically stated. Jonathan Bromley |
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06-25-2005, 03:57 AM
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#4 |
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Re: Log implementation in vhdl
wrote:
> Hi all, how can we implement logarithm of a number in VHDL. > any tips ??? thanx You'll find one is the floating point algorithms: http://www.eda.org/vhdl-200x/vhdl-20...ges/files.html The file is: http://www.eda.org/vhdl-200x/vhdl-20...se_alg_pkg.vhd David Bishop |
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06-25-2005, 03:31 PM
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#5 |
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Re: Log implementation in vhdl
Thanks.
Jonathan Bromley wrote: > On 24 Jun 2005 07:36:14 -0700, wrote: > > >Hi all, how can we implement logarithm of a number in VHDL. > >any tips ??? thanx > > A normaliser counts leading zeros and extracts the mantissa, > so giving the logarithm to within 6dB. Typically you can > then do table lookup on the top few bits of the normalised > result, to get some more accuracy. > > Obviously, it depends on the precision you need. > > Standard methods such as Taylor series and CORDIC may also > be useful if you want really high precision. Once again, > it's MUCH easier if you normalise the number first, so that > you only need to find the log of a number in the range > 0.5 to 1.0 > -- > Jonathan Bromley, Consultant > > DOULOS - Developing Design Know-how > VHDL, Verilog, SystemC, Perl, Tcl/Tk, Verification, Project Services > > Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, BH24 1AW, UK > Tel: +44 (0)1425 471223 mail: > Fax: +44 (0)1425 471573 Web: http://www.doulos.com > > The contents of this message may contain personal views which > are not the views of Doulos Ltd., unless specifically stated. praveen.rajaretnam@gmail.com |
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06-27-2005, 07:36 AM
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#6 |
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Re: Log implementation in vhdl
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