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VHDL - exiting from state machine

 
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Old 06-22-2005, 10:50 AM   #1
Default exiting from state machine


if (rst='1') then
mplr := (others=>'0');
st <= idle;
i <= "000";
elsif (clk'event and clk='1') then
case st is
when idle => tmc := "00000000" & mc;
st <= add;
when add => if (mp(conv_integer(i))='1') then
mplr := mplr + tmc ;
end if;
st <= shift;

when shift => tmc := tmc(14 downto 0) & '0';
i <= i + 1;
st <= add;
if (i = "111")then
-- from here i want that i shoud come out of
states, bcoz i've got the output. i m coming out by taking one more
state. is there any other way of coming out from the state machines
without taking one more state. of course 'exit' doesn't work here.



jiten
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Old 06-22-2005, 03:26 PM   #2
Ralf Hildebrandt
 
Posts: n/a
Default Re: exiting from state machine
jiten wrote:

> if (rst='1') then
> mplr := (others=>'0');
> st <= idle;
> i <= "000";
> elsif (clk'event and clk='1') then
> case st is
> when idle => tmc := "00000000" & mc;
> st <= add;
> when add => if (mp(conv_integer(i))='1') then
> mplr := mplr + tmc ;
> end if;
> st <= shift;
>
> when shift => tmc := tmc(14 downto 0) & '0';
> i <= i + 1;
> st <= add;
> if (i = "111")then
> -- from here i want that i shoud come out of
> states, bcoz i've got the output.


Seems to me, that you are thinking like sofware and you are looking for
a similar thing to the ANSI C "break;".

VHDL case has different behavoir than ANSI C switch. You don't need a
"break;".

Just test
if (i /= "111") then
and do there all the stuff you need and don't use an else clause. ->
Nothing will then be done in the state "shift".



Generally: Don't program VHDL! Model hardware with it. VHDL is not a
software language.

Ralf


Ralf Hildebrandt
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Old 06-22-2005, 06:19 PM   #3
Alex
 
Posts: n/a
Default Re: exiting from state machine
Hi,

The software approach is obvious in here . The thing is that you don't
go out of the state machine
- simple implement some idle(dummy) state.
In your case it won't make a problem as you have already have 2
flops(unless you want to use on-hot coding), so forth state
will be fine.
p.s. VHDL is not a programming language- it is descrptive one
Regards,
Alex

> if (rst='1') then
> mplr := (others=>'0');
> st <= idle;
> i <= "000";
> elsif (clk'event and clk='1') then
> case st is
> when idle => tmc := "00000000" & mc;
> st <= add;
> when add => if (mp(conv_integer(i))='1') then
> mplr := mplr + tmc ;
> end if;
> st <= shift;
>
> when shift => tmc := tmc(14 downto 0) & '0';
> i <= i + 1;
> st <= add;
> if (i = "111")then
> -- from here i want that i shoud come out of
> states, bcoz i've got the output. i m coming out by taking one more
> state. is there any other way of coming out from the state machines
> without taking one more state. of course 'exit' doesn't work here.
>

--
Using Opera's revolutionary e-mail client: http://www.opera.com/mail/


Alex
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Old 08-14-2005, 09:18 PM   #4
Alex
 
Posts: n/a
Default Re: exiting from state machine
Hi,

The software approach is obvious in here . The thing is that you don't
go out of the state machine
- simple implement some idle(dummy) state.
In your case it won't make a problem as you have already have 2
flops(unless you want to use on-hot coding), so forth state
will be fine.
p.s. VHDL is not a programming language- it is descrptive one
Regards,
Alex

> if (rst='1') then
> mplr := (others=>'0');
> st <= idle;
> i <= "000";
> elsif (clk'event and clk='1') then
> case st is
> when idle => tmc := "00000000" & mc;
> st <= add;
> when add => if (mp(conv_integer(i))='1') then
> mplr := mplr + tmc ;
> end if;
> st <= shift;
>
> when shift => tmc := tmc(14 downto 0) & '0';
> i <= i + 1;
> st <= add;
> if (i = "111")then
> -- from here i want that i shoud come out of
> states, bcoz i've got the output. i m coming out by taking one more
> state. is there any other way of coming out from the state machines
> without taking one more state. of course 'exit' doesn't work here.
>




--
Alex


Alex
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