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#1 |
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hi all
i need code for two functions in vhdl. 1. binary to integer ( any lenth _ no problem) 2. interger to binary iam very thankful to you all . bye srinukasam |
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#2 |
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Posts: n/a
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srinukasam wrote:
> i need code for two functions in vhdl. > 1. binary to integer ( any lenth _ no problem) > 2. interger to binary Take a look into the packages! library IEEE; use IEEE.numeric_std.all; -- signal my_sulv1 : std_ulogic_vector(15 downto 0); signal my_int : integer; signal my_sulv2 : std_ulogic_vector(15 downto 0); -- my_int <= to_integer(unsigned(my_sulv1)); my_sulv2 <= std_ulogic_vector(to_unsigned(my_int, 16)); Ralf Ralf Hildebrandt |
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#3 |
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Posts: n/a
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try conv_integer(unsigned(x)) and conv_std_logic_vector(integer,
number_of_bits_for_conversion) I believe they're both defined in IEEE.std_logic_arith bstaicu |
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#4 |
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Posts: n/a
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bstaicu wrote:
> try conv_integer(unsigned(x)) and conv_std_logic_vector(integer, > number_of_bits_for_conversion) > > I believe they're both defined in IEEE.std_logic_arith Non, please don't try them, because std_logic_arith is NOT a standard library while numeric_std is one. Therefore your code may not run as expected on different simulators and synthesis tools. Ralf Ralf Hildebrandt |
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